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From: matt@masarand.com
To: bhelgaas@google.com
Cc: linux-pci@vger.kernel.org, Matthew Minter <matt@masarand.com>
Subject: [PATCH 15/18] Delayed unicore32 setup of PCI IRQs to bus scan time
Date: Thu,  2 Oct 2014 04:50:34 +0100	[thread overview]
Message-ID: <1412221837-17452-16-git-send-email-matt@masarand.com> (raw)
In-Reply-To: <1412221837-17452-1-git-send-email-matt@masarand.com>

From: Matthew Minter <matt@masarand.com>

PCI IRQs are currently assigned during pci_common_init, this is only run
at boot time so devices hot-plugged after boot will not be allocated an IRQ.
this is fixed here by defering the assignment untill the device enable code,
instead registering the function pointer at boot time.

---
 arch/unicore32/kernel/pci.c | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/arch/unicore32/kernel/pci.c b/arch/unicore32/kernel/pci.c
index 374a055..6a9da80 100644
--- a/arch/unicore32/kernel/pci.c
+++ b/arch/unicore32/kernel/pci.c
@@ -101,7 +101,7 @@ void pci_puv3_preinit(void)
 	writel(readl(PCIBRI_CMD) | PCIBRI_CMD_IO | PCIBRI_CMD_MEM, PCIBRI_CMD);
 }
 
-static int __init pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+static int pci_puv3_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
 {
 	if (dev->bus->number == 0) {
 #ifdef CONFIG_ARCH_FPGA /* 4 pci slots */
@@ -263,8 +263,6 @@ static int __init pci_common_init(void)
 	if (!puv3_bus)
 		panic("PCI: unable to scan bus!");
 
-	pci_fixup_irqs(pci_common_swizzle, pci_puv3_map_irq);
-
 	if (!pci_has_flag(PCI_PROBE_ONLY)) {
 		/*
 		 * Size the bridge windows.
@@ -281,6 +279,13 @@ static int __init pci_common_init(void)
 }
 subsys_initcall(pci_common_init);
 
+int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
+{
+	bridge->swizzle_irq = pci_common_swizzle;
+	bridge->map_irq = pci_puv3_map_irq;
+	return 0;
+}
+
 char * __init pcibios_setup(char *str)
 {
 	if (!strcmp(str, "debug")) {
-- 
2.1.0


  parent reply	other threads:[~2014-10-02  3:59 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-02  3:50 [PATCH V3] Delay allocation of PCI device IRQs from boot time until bus scan time to fix PCI hotplugging matt
2014-10-02  3:50 ` [PATCH 01/18] Added way to register deferred PCI IRQ assignment handlers matt
2014-10-02  3:50 ` [PATCH 02/18] Delayed x86 setup of PCI IRQs to bus scan time matt
2014-10-02  3:50 ` [PATCH 03/18] Delayed arm " matt
2014-10-02  3:50 ` [PATCH 04/18] Delayed powerpc " matt
2014-10-02  3:50 ` [PATCH 05/18] Delayed sh " matt
2014-10-02  3:50 ` [PATCH 06/18] Delayed alpha " matt
2014-10-02  3:50 ` [PATCH 07/18] Delayed cris " matt
2014-10-02  3:50 ` [PATCH 08/18] Delayed frv " matt
2014-10-02  3:50 ` [PATCH 09/18] Delayed m68k " matt
2014-10-02  3:50 ` [PATCH 10/18] Delayed microblaze " matt
2014-10-02  3:50 ` [PATCH 11/18] Delayed mips " matt
2014-10-02  3:50 ` [PATCH 12/18] Delayed mn10300 " matt
2014-10-02  3:50 ` [PATCH 13/18] Delayed sparc " matt
2014-10-02  3:50 ` [PATCH 14/18] Delayed tile " matt
2014-10-02  3:50 ` matt [this message]
2014-10-02  3:50 ` [PATCH 16/18] Disabled bus scan time PCI IRQ assignment on ia64 matt
2014-10-02  3:50 ` [PATCH 17/18] Disabled bus scan time PCI IRQ assignment on parisc matt
2014-10-02  3:50 ` [PATCH 18/18] Disabled bus scan time PCI IRQ assignment on s390 matt
2014-10-02  4:07 [PATCH V3] Delay allocation of PCI device IRQs from boot time until bus scan time to fix PCI hotplugging matt
2014-10-02  4:07 ` [PATCH 15/18] Delayed unicore32 setup of PCI IRQs to bus scan time matt

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