From: "Shradha Todi" <shradha.t@samsung.com>
To: <linux-kernel@vger.kernel.org>, <linux-pci@vger.kernel.org>
Cc: <jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
<robh@kernel.org>, <lorenzo.pieralisi@arm.com>,
<bhelgaas@google.com>, <pankaj.dubey@samsung.com>,
<sriram.dash@samsung.com>, <niyas.ahmed@samsung.com>,
<p.rajanbabu@samsung.com>, <l.mehra@samsung.com>,
<hari.tv@samsung.com>
Subject: RE: [PATCH v2] PCI: dwc: Change size to u64 for EP outbound iATU
Date: Tue, 19 Jan 2021 15:42:03 +0530 [thread overview]
Message-ID: <147901d6ee4b$8a39f3e0$9eaddba0$@samsung.com> (raw)
In-Reply-To: <1609929900-19082-1-git-send-email-shradha.t@samsung.com>
Gentle Ping.
Thanks.
> -----Original Message-----
> From: Shradha Todi <shradha.t@samsung.com>
> Subject: [PATCH v2] PCI: dwc: Change size to u64 for EP outbound iATU
>
> Since outbound iATU permits size to be greater than 4GB for which the
> support is also available, allow EP function to send u64 size instead of
> truncating to u32.
>
> Signed-off-by: Shradha Todi <shradha.t@samsung.com>
> ---
> v1: https://lkml.org/lkml/2020/12/18/690
> v2:
> Addressed Bjorn's review on to keep commit message length limit to 75
>
> drivers/pci/controller/dwc/pcie-designware.c | 2 +-
> drivers/pci/controller/dwc/pcie-designware.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c
> b/drivers/pci/controller/dwc/pcie-designware.c
> index 1d62ca9..db407ed 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -326,7 +326,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
> int index, int type,
>
> void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int
> index,
> int type, u64 cpu_addr, u64 pci_addr,
> - u32 size)
> + u64 size)
> {
> __dw_pcie_prog_outbound_atu(pci, func_no, index, type,
> cpu_addr, pci_addr, size);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h
> b/drivers/pci/controller/dwc/pcie-designware.h
> index 7da79eb..359151f 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -302,7 +302,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
> int index,
> u64 size);
> void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int
> index,
> int type, u64 cpu_addr, u64 pci_addr,
> - u32 size);
> + u64 size);
> int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
> int bar, u64 cpu_addr,
> enum dw_pcie_as_type as_type);
> --
> 2.7.4
next prev parent reply other threads:[~2021-01-19 13:03 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20210106104514epcas5p37d8e3a88aefdf109f7fb4157d4a1f07a@epcas5p3.samsung.com>
2021-01-06 10:45 ` [PATCH v2] PCI: dwc: Change size to u64 for EP outbound iATU Shradha Todi
2021-01-06 11:29 ` Pankaj Dubey
2021-01-19 10:12 ` Shradha Todi [this message]
2021-02-01 18:53 ` Lorenzo Pieralisi
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