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From: Yongji Xie <xyjxie@linux.vnet.ibm.com>
To: bhelgaas@google.com
Cc: linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	alex.williamson@redhat.com, gwshan@linux.vnet.ibm.com,
	aik@ozlabs.ru, benh@kernel.crashing.org, mpe@ellerman.id.au,
	paulus@samba.org, zhong@linux.vnet.ibm.com
Subject: [PATCH v9 2/3] PCI: Add a macro to set default alignment for all PCI devices
Date: Wed, 15 Feb 2017 14:45:05 +0800	[thread overview]
Message-ID: <1487141106-2503-3-git-send-email-xyjxie@linux.vnet.ibm.com> (raw)
In-Reply-To: <1487141106-2503-1-git-send-email-xyjxie@linux.vnet.ibm.com>

When vfio passthroughs a PCI device of which MMIO BARs are
smaller than PAGE_SIZE, guest will not handle the mmio
accesses to the BARs which leads to mmio emulations in host.

This is because vfio will not allow to passthrough one BAR's
mmio page which may be shared with other BARs. Otherwise,
there will be a backdoor that guest can use to access BARs
of other guest.

This patch adds a macro to set default alignment for all
PCI devices. Then we could solve this issue on some platforms
which would easily hit this issue because of their 64K page
such as PowerNV platform by defining this macro as PAGE_SIZE.

Signed-off-by: Yongji Xie <xyjxie@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/pci.h |    4 ++++
 drivers/pci/pci.c              |    3 +++
 2 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index e9bd6cf..5e31bc2 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -28,6 +28,10 @@
 #define PCIBIOS_MIN_IO		0x1000
 #define PCIBIOS_MIN_MEM		0x10000000
 
+#ifdef CONFIG_PPC_POWERNV
+#define PCIBIOS_DEFAULT_ALIGNMENT	PAGE_SIZE
+#endif
+
 struct pci_dev;
 
 /* Values for the `which' argument to sys_pciconfig_iobase syscall.  */
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a881c0d..2622e9b 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -4965,6 +4965,9 @@ static resource_size_t pci_specified_resource_alignment(struct pci_dev *dev)
 	resource_size_t align = 0;
 	char *p;
 
+#ifdef PCIBIOS_DEFAULT_ALIGNMENT
+	align = PCIBIOS_DEFAULT_ALIGNMENT;
+#endif
 	spin_lock(&resource_alignment_lock);
 	p = resource_alignment_param;
 	if (!*p)
-- 
1.7.1

  parent reply	other threads:[~2017-02-15  6:45 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-15  6:45 [PATCH v9 0/3] PCI: Introduce a way to enforce all MMIO BARs not to share PAGE_SIZE Yongji Xie
2017-02-15  6:45 ` [PATCH v9 1/3] PCI: A fix for caculating bridge window's size and alignment Yongji Xie
2017-02-15  6:45 ` Yongji Xie [this message]
2017-03-23 20:53   ` [PATCH v9 2/3] PCI: Add a macro to set default alignment for all PCI devices Bjorn Helgaas
2017-03-23 21:57     ` Bjorn Helgaas
2017-03-25 12:36     ` Yongji Xie
2017-03-27 10:17     ` Michael Ellerman
2017-03-27 10:25       ` Benjamin Herrenschmidt
2017-03-30 23:13         ` Bjorn Helgaas
2017-02-15  6:45 ` [PATCH v9 3/3] PCI: Don't extend device's size when using default alignment for all devices Yongji Xie
2017-03-23 21:55   ` Bjorn Helgaas
2017-03-25 12:46     ` Yongji Xie

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