From: Jim Quinlan <jim2101024@gmail.com>
To: linux-kernel@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Brian Norris <computersforpeace@gmail.com>,
Russell King <rmk+kernel@armlinux.org.uk>,
Robin Murphy <robin.murphy@arm.com>,
Christoph Hellwig <hch@lst.de>,
Florian Fainelli <f.fainelli@gmail.com>,
Jonas Gorski <jonas.gorski@gmail.com>
Cc: linux-pci@vger.kernel.org, bcm-kernel-feedback-list@broadcom.com,
Gregory Fong <gregory.0xf0@gmail.com>,
Kevin Cernekee <cernekee@gmail.com>,
Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-mips@linux-mips.org, Ralf Baechle <ralf@linux-mips.org>,
Jim Quinlan <jim2101024@gmail.com>
Subject: [PATCH v3 7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435
Date: Tue, 14 Nov 2017 17:12:11 -0500 [thread overview]
Message-ID: <1510697532-32828-8-git-send-email-jim2101024@gmail.com> (raw)
In-Reply-To: <1510697532-32828-1-git-send-email-jim2101024@gmail.com>
Adds the PCIe nodes for the Broadcom STB PCIe root complex.
Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
---
arch/mips/boot/dts/brcm/bcm7425.dtsi | 26 ++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm7435.dtsi | 27 +++++++++++++++++++++++++++
arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4 ++++
arch/mips/boot/dts/brcm/bcm97435svmb.dts | 4 ++++
4 files changed, 61 insertions(+)
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index f56fb25..c7bd88b 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -494,4 +494,30 @@
status = "disabled";
};
};
+
+ pcie: pcie@10410000 {
+ reg = <0x10410000 0x830c>;
+ compatible = "brcm,bcm7425-pcie";
+ interrupts = <37>, <37>;
+ interrupt-names = "pcie", "msi";
+ interrupt-parent = <&periph_intc>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ linux,pci-domain = <0>;
+ brcm,enable-ssc;
+ bus-range = <0x00 0xff>;
+ msi-controller;
+ #interrupt-cells = <1>;
+ /* 4x128mb windows */
+ ranges = <0x2000000 0x0 0xd0000000 0xd0000000 0 0x08000000>,
+ <0x2000000 0x0 0xd8000000 0xd8000000 0 0x08000000>,
+ <0x2000000 0x0 0xe0000000 0xe0000000 0 0x08000000>,
+ <0x2000000 0x0 0xe8000000 0xe8000000 0 0x08000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &periph_intc 33
+ 0 0 0 2 &periph_intc 34
+ 0 0 0 3 &periph_intc 35
+ 0 0 0 4 &periph_intc 36>;
+ };
+
};
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index f2cead2..d321042 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -509,4 +509,31 @@
status = "disabled";
};
};
+
+ pcie: pcie@10410000 {
+ reg = <0x10410000 0x930c>;
+ interrupts = <0x27>, <0x27>;
+ interrupt-names = "pcie", "msi";
+ interrupt-parent = <&periph_intc>;
+ compatible = "brcm,bcm7435-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ linux,pci-domain = <0>;
+ brcm,enable-ssc;
+ bus-range = <0x00 0xff>;
+ msi-controller;
+ #interrupt-cells = <1>;
+ /* 4x128mb windows */
+ ranges = <0x2000000 0x0 0xd0000000 0xd0000000 0 0x08000000>,
+ <0x2000000 0x0 0xd8000000 0xd8000000 0 0x08000000>,
+ <0x2000000 0x0 0xe0000000 0xe0000000 0 0x08000000>,
+ <0x2000000 0x0 0xe8000000 0xe8000000 0 0x08000000>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0 0 0 1 &periph_intc 35
+ 0 0 0 2 &periph_intc 36
+ 0 0 0 3 &periph_intc 37
+ 0 0 0 4 &periph_intc 38>;
+ status = "disabled";
+ };
+
};
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index 73aa006..3a87ac5 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -143,3 +143,7 @@
&mspi {
status = "okay";
};
+
+&pcie {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 0a915f3..456d024 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -119,3 +119,7 @@
&mspi {
status = "okay";
};
+
+&pcie {
+ status = "okay";
+};
--
1.9.0.138.g2de3478
next prev parent reply other threads:[~2017-11-14 22:12 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-14 22:12 [PATCH v3 0/8] PCI: brcmstb: Add Broadcom Settopbox PCIe support (V3) Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 1/8] SOC: brcmstb: add memory API Jim Quinlan
2017-12-05 20:59 ` Bjorn Helgaas
2017-12-08 23:28 ` Florian Fainelli
2017-12-12 20:53 ` Jim Quinlan
2017-12-12 21:14 ` Bjorn Helgaas
2017-12-15 17:14 ` Lorenzo Pieralisi
2017-12-15 19:50 ` Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 2/8] dt-bindings: pci: Add DT docs for Brcmstb PCIe device Jim Quinlan
2017-11-16 5:07 ` Rob Herring
2017-11-14 22:12 ` [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver Jim Quinlan
2017-12-12 22:16 ` Bjorn Helgaas
2017-12-13 23:53 ` Jim Quinlan
2017-12-14 22:51 ` Bjorn Helgaas
2017-12-15 19:53 ` Jim Quinlan
2017-12-15 20:14 ` Bjorn Helgaas
2017-12-14 20:30 ` Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic Jim Quinlan
2017-12-12 22:32 ` Bjorn Helgaas
2017-11-14 22:12 ` [PATCH v3 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 6/8] PCI: brcmstb: Add MSI capability Jim Quinlan
2017-12-12 22:43 ` Bjorn Helgaas
2017-11-14 22:12 ` Jim Quinlan [this message]
2017-11-14 22:12 ` [PATCH v3 8/8] MIPS: BMIPS: Enable PCI Jim Quinlan
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