From: Jim Quinlan <jim2101024@gmail.com> To: linux-kernel@vger.kernel.org Cc: Mark Rutland <mark.rutland@arm.com>, devicetree@vger.kernel.org, Florian Fainelli <f.fainelli@gmail.com>, linux-pci@vger.kernel.org, Rob Herring <robh+dt@kernel.org>, Jim Quinlan <jim2101024@gmail.com>, bcm-kernel-feedback-list@broadcom.com, Gregory Fong <gregory.0xf0@gmail.com>, Bjorn Helgaas <bhelgaas@google.com>, Brian Norris <computersforpeace@gmail.com>, Christoph Hellwig <hch@lst.de>, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device Date: Wed, 19 Sep 2018 10:31:57 -0400 [thread overview] Message-ID: <1537367527-20773-3-git-send-email-jim2101024@gmail.com> (raw) In-Reply-To: <1537367527-20773-1-git-send-email-jim2101024@gmail.com> The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/pci/brcmstb-pcie.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/brcmstb-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt b/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt new file mode 100644 index 0000000..a1a9ad5 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt @@ -0,0 +1,59 @@ +Brcmstb PCIe Host Controller Device Tree Bindings + +Required Properties: +- compatible + "brcm,bcm7425-pcie" -- for 7425 family MIPS-based SOCs. + "brcm,bcm7435-pcie" -- for 7435 family MIPS-based SOCs. + "brcm,bcm7445-pcie" -- for 7445 and later ARM based SOCs (not including + the 7278). + "brcm,bcm7278-pcie" -- for 7278 family ARM-based SOCs. + +- reg -- the register start address and length for the PCIe reg block. +- interrupts -- two interrupts are specified; the first interrupt is for + the PCI host controller and the second is for MSI if the built-in + MSI controller is to be used. +- interrupt-names -- names of the interrupts (above): "pcie" and "msi". +- #address-cells -- set to <3>. +- #size-cells -- set to <2>. +- #interrupt-cells: set to <1>. +- interrupt-map-mask and interrupt-map, standard PCI properties to define the + mapping of the PCIe interface to interrupt numbers. +- ranges: ranges for the PCI memory and I/O regions. +- linux,pci-domain -- should be unique per host controller. + +Optional Properties: +- clocks -- phandle of pcie clock. +- clock-names -- set to "sw_pcie" if clocks is used. +- dma-ranges -- Specifies the inbound memory mapping regions when + an "identity map" is not possible. +- msi-controller -- this property is typically specified to have the + PCIe controller use its internal MSI controller. +- msi-parent -- set to use an external MSI interrupt controller. +- brcm,enable-ssc -- (boolean) indicates usage of spread-spectrum clocking. +- max-link-speed -- (integer) indicates desired generation of link: + 1 => 2.5 Gbps (gen1), 2 => 5.0 Gbps (gen2), 3 => 8.0 Gbps (gen3). + +Example Node: + +pcie0: pcie@f0460000 { + reg = <0x0 0xf0460000 0x0 0x9310>; + interrupts = <0x0 0x0 0x4>; + compatible = "brcm,bcm7445-pcie"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000 + 0x02000000 0x00000000 0x08000000 0x00000000 0xc8000000 0x00000000 0x08000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &intc 0 47 3 + 0 0 0 2 &intc 0 48 3 + 0 0 0 3 &intc 0 49 3 + 0 0 0 4 &intc 0 50 3>; + clocks = <&sw_pcie0>; + clock-names = "sw_pcie"; + msi-parent = <&pcie0>; /* use PCIe's internal MSI controller */ + msi-controller; /* use PCIe's internal MSI controller */ + brcm,ssc; + max-link-speed = <1>; + linux,pci-domain = <0>; + }; -- 1.9.0.138.g2de3478 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
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From: Jim Quinlan <jim2101024@gmail.com> To: linux-kernel@vger.kernel.org Cc: Jim Quinlan <jim2101024@gmail.com>, Bjorn Helgaas <bhelgaas@google.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Brian Norris <computersforpeace@gmail.com>, Gregory Fong <gregory.0xf0@gmail.com>, Florian Fainelli <f.fainelli@gmail.com>, bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Christoph Hellwig <hch@lst.de> Subject: [PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device Date: Wed, 19 Sep 2018 10:31:57 -0400 [thread overview] Message-ID: <1537367527-20773-3-git-send-email-jim2101024@gmail.com> (raw) Message-ID: <20180919143157.pgQZ0Ep2WjWyo3gRoySKhM2sF-ge2pNjmmzjm70wA-Y@z> (raw) In-Reply-To: <1537367527-20773-1-git-send-email-jim2101024@gmail.com> The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan <jim2101024@gmail.com> Acked-by: Rob Herring <robh@kernel.org> --- .../devicetree/bindings/pci/brcmstb-pcie.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/brcmstb-pcie.txt diff --git a/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt b/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt new file mode 100644 index 0000000..a1a9ad5 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/brcmstb-pcie.txt @@ -0,0 +1,59 @@ +Brcmstb PCIe Host Controller Device Tree Bindings + +Required Properties: +- compatible + "brcm,bcm7425-pcie" -- for 7425 family MIPS-based SOCs. + "brcm,bcm7435-pcie" -- for 7435 family MIPS-based SOCs. + "brcm,bcm7445-pcie" -- for 7445 and later ARM based SOCs (not including + the 7278). + "brcm,bcm7278-pcie" -- for 7278 family ARM-based SOCs. + +- reg -- the register start address and length for the PCIe reg block. +- interrupts -- two interrupts are specified; the first interrupt is for + the PCI host controller and the second is for MSI if the built-in + MSI controller is to be used. +- interrupt-names -- names of the interrupts (above): "pcie" and "msi". +- #address-cells -- set to <3>. +- #size-cells -- set to <2>. +- #interrupt-cells: set to <1>. +- interrupt-map-mask and interrupt-map, standard PCI properties to define the + mapping of the PCIe interface to interrupt numbers. +- ranges: ranges for the PCI memory and I/O regions. +- linux,pci-domain -- should be unique per host controller. + +Optional Properties: +- clocks -- phandle of pcie clock. +- clock-names -- set to "sw_pcie" if clocks is used. +- dma-ranges -- Specifies the inbound memory mapping regions when + an "identity map" is not possible. +- msi-controller -- this property is typically specified to have the + PCIe controller use its internal MSI controller. +- msi-parent -- set to use an external MSI interrupt controller. +- brcm,enable-ssc -- (boolean) indicates usage of spread-spectrum clocking. +- max-link-speed -- (integer) indicates desired generation of link: + 1 => 2.5 Gbps (gen1), 2 => 5.0 Gbps (gen2), 3 => 8.0 Gbps (gen3). + +Example Node: + +pcie0: pcie@f0460000 { + reg = <0x0 0xf0460000 0x0 0x9310>; + interrupts = <0x0 0x0 0x4>; + compatible = "brcm,bcm7445-pcie"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x02000000 0x00000000 0x00000000 0x00000000 0xc0000000 0x00000000 0x08000000 + 0x02000000 0x00000000 0x08000000 0x00000000 0xc8000000 0x00000000 0x08000000>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &intc 0 47 3 + 0 0 0 2 &intc 0 48 3 + 0 0 0 3 &intc 0 49 3 + 0 0 0 4 &intc 0 50 3>; + clocks = <&sw_pcie0>; + clock-names = "sw_pcie"; + msi-parent = <&pcie0>; /* use PCIe's internal MSI controller */ + msi-controller; /* use PCIe's internal MSI controller */ + brcm,ssc; + max-link-speed = <1>; + linux,pci-domain = <0>; + }; -- 1.9.0.138.g2de3478
next prev parent reply other threads:[~2018-09-19 14:31 UTC|newest] Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top 2018-09-19 14:31 [PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support (resend) Jim Quinlan 2018-09-19 14:31 ` [PATCH v5 01/12] soc: bcm: brcmstb: add memory API Jim Quinlan 2018-09-19 14:31 ` Jim Quinlan [this message] 2018-09-19 14:31 ` [PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device Jim Quinlan 2018-09-20 9:06 ` Jonas Gorski 2018-09-21 18:00 ` Jim Quinlan 2018-09-19 14:31 ` [PATCH v5 03/12] PCI: brcmstb: add Broadcom STB PCIe host controller driver Jim Quinlan 2018-09-19 14:31 ` [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic Jim Quinlan 2018-09-19 14:31 ` Jim Quinlan 2018-09-20 2:19 ` Ard Biesheuvel 2018-09-20 20:55 ` Florian Fainelli 2018-09-20 21:04 ` Ard Biesheuvel 2018-09-20 21:31 ` Florian Fainelli 2018-09-20 21:33 ` Ard Biesheuvel 2018-09-20 21:39 ` Florian Fainelli 2018-09-21 17:40 ` Jim Quinlan 2018-09-24 8:25 ` Ard Biesheuvel 2018-09-24 15:01 ` Jim Quinlan 2018-09-26 2:59 ` Florian Fainelli 2018-09-26 7:59 ` Ard Biesheuvel 2018-09-26 10:56 ` Robin Murphy 2018-10-01 18:13 ` Florian Fainelli 2019-06-27 16:55 ` Stefan Wahren 2018-09-19 14:32 ` [PATCH v5 05/12] PCI: brcmstb: add MSI capability Jim Quinlan 2018-09-19 14:32 ` Jim Quinlan 2018-09-19 14:32 ` [PATCH v5 06/12] MIPS: BMIPS: add dma remap for BrcmSTB PCIe Jim Quinlan 2018-09-26 22:07 ` Paul Burton 2018-09-28 21:48 ` Jim Quinlan 2018-09-19 14:32 ` [PATCH v5 07/12] PCI/MSI: enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan 2018-09-19 14:32 ` [PATCH v5 08/12] MIPS: BMIPS: add PCI bindings for 7425, 7435 Jim Quinlan 2018-09-19 14:32 ` [PATCH v5 09/12] MIPS: BMIPS: enable PCI Jim Quinlan 2018-09-19 14:32 ` [PATCH v5 10/12] ARM64: declare __phys_to_dma on ARCH_HAS_PHYS_TO_DMA Jim Quinlan 2018-09-19 14:37 ` Christoph Hellwig 2018-09-19 14:32 ` [PATCH v5 11/12] ARM64: add dma remap for BrcmSTB PCIe Jim Quinlan 2018-09-19 14:32 ` Jim Quinlan 2018-09-19 14:41 ` Christoph Hellwig 2018-09-19 14:41 ` Christoph Hellwig 2018-09-21 18:29 ` Jim Quinlan 2018-09-19 14:32 ` [PATCH v5 12/12] ARM: " Jim Quinlan 2019-03-20 23:15 ` [PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support (resend) Bjorn Helgaas 2019-03-20 23:22 ` Florian Fainelli
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