From: Anvesh Salveru <anvesh.s@samsung.com>
To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Cc: bhelgaas@google.com, gustavo.pimentel@synopsys.com,
jingoohan1@gmail.com, pankaj.dubey@samsung.com,
Anvesh Salveru <anvesh.s@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Subject: [PATCH v2 1/2] dt-bindings: PCI: designware: Add binding for ZRX-DC PHY property
Date: Mon, 28 Oct 2019 17:46:27 +0530 [thread overview]
Message-ID: <1572264988-17455-2-git-send-email-anvesh.s@samsung.com> (raw)
In-Reply-To: <1572264988-17455-1-git-send-email-anvesh.s@samsung.com>
Add support for ZRX-DC compliant PHYs. If PHY is not compliant to ZRX-DC
specification, then after every 100ms link should transition to recovery
state during the low power states which increases power consumption.
Platforms with ZRX-DC compliant PHY can use "snps,phy-zrxdc-compliant"
property in DesignWare controller DT node.
CC: Rob Herring <robh+dt@kernel.org>
CC: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Anvesh Salveru <anvesh.s@samsung.com>
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
---
Change in v2: None
Documentation/devicetree/bindings/pci/designware-pcie.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt
index 78494c4050f7..9507ac38ac89 100644
--- a/Documentation/devicetree/bindings/pci/designware-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt
@@ -38,6 +38,8 @@ Optional properties:
for data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers, DMA and iATU (internal Address
Translation Unit) registers.
+- snps,phy-zrxdc-compliant: This property is needed if phy complies with the
+ ZRX-DC specification.
RC mode:
- num-viewport: number of view ports configured in hardware. If a platform
does not specify it, the driver assumes 2.
--
2.17.1
next prev parent reply other threads:[~2019-10-28 12:17 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20191028121704epcas5p483bf05ccb4cd25b1757cd5645e819d12@epcas5p4.samsung.com>
2019-10-28 12:16 ` [PATCH v2 0/2] Add support to handle ZRX-DC Compliant PHYs Anvesh Salveru
[not found] ` <CGME20191028121748epcas5p3054c9583c14a2edde9f725d005895a04@epcas5p3.samsung.com>
2019-10-28 12:16 ` Anvesh Salveru [this message]
2019-11-05 21:53 ` [PATCH v2 1/2] dt-bindings: PCI: designware: Add binding for ZRX-DC PHY property Rob Herring
2019-11-06 9:53 ` Andrew Murray
2019-11-08 3:24 ` Pankaj Dubey
2019-11-08 9:55 ` Andrew Murray
2019-11-11 17:52 ` Rob Herring
[not found] ` <CGME20191028121758epcas5p2dda6d0842be32bcab2e6025fac1f3e78@epcas5p2.samsung.com>
2019-10-28 12:16 ` [PATCH v2 2/2] PCI: dwc: Add support to handle ZRX-DC Compliant PHYs Anvesh Salveru
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