From: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
To: horms@verge.net.au, linux-pci@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org, stable@vger.kernel.org,
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Subject: [PATCH 1/2] Revert "PCI: rcar: Fix missing MACCTLR register setting in rcar_pcie_hw_init()"
Date: Wed, 30 Oct 2019 20:27:03 +0900 [thread overview]
Message-ID: <1572434824-1850-2-git-send-email-yoshihiro.shimoda.uh@renesas.com> (raw)
In-Reply-To: <1572434824-1850-1-git-send-email-yoshihiro.shimoda.uh@renesas.com>
This reverts commit 175cc093888ee74a17c4dd5f99ba9a6bc86de5be.
The commit description/code don't follow the manual accurately,
it's difficult to understand. So, this patch reverts the commit.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
drivers/pci/controller/pcie-rcar.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/pci/controller/pcie-rcar.c b/drivers/pci/controller/pcie-rcar.c
index 0dadccb..40d8c54 100644
--- a/drivers/pci/controller/pcie-rcar.c
+++ b/drivers/pci/controller/pcie-rcar.c
@@ -91,7 +91,6 @@
#define LINK_SPEED_2_5GTS (1 << 16)
#define LINK_SPEED_5_0GTS (2 << 16)
#define MACCTLR 0x011058
-#define MACCTLR_RESERVED BIT(0)
#define SPEED_CHANGE BIT(24)
#define SCRAMBLE_DISABLE BIT(27)
#define PMSR 0x01105c
@@ -614,8 +613,6 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
if (IS_ENABLED(CONFIG_PCI_MSI))
rcar_pci_write_reg(pcie, 0x801f0000, PCIEMSITXR);
- rcar_rmw32(pcie, MACCTLR, MACCTLR_RESERVED, 0);
-
/* Finish initialization - establish a PCI Express link */
rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
@@ -1238,7 +1235,6 @@ static int rcar_pcie_resume_noirq(struct device *dev)
return 0;
/* Re-establish the PCIe link */
- rcar_rmw32(pcie, MACCTLR, MACCTLR_RESERVED, 0);
rcar_pci_write_reg(pcie, CFINIT, PCIETCTLR);
return rcar_pcie_wait_for_dl(pcie);
}
--
2.7.4
next prev parent reply other threads:[~2019-10-30 11:27 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-30 11:27 [PATCH 0/2] PCI: rcar: Fix missing MACCTLR register setting (take2) Yoshihiro Shimoda
2019-10-30 11:27 ` Yoshihiro Shimoda [this message]
2019-10-30 13:30 ` [PATCH 1/2] Revert "PCI: rcar: Fix missing MACCTLR register setting in rcar_pcie_hw_init()" Greg KH
2019-10-30 11:27 ` [PATCH 2/2] PCI: rcar: Fix missing MACCTLR register setting in initialize sequence Yoshihiro Shimoda
2019-10-30 16:34 ` Eugeniu Rosca
2019-11-01 5:08 ` Yoshihiro Shimoda
2019-11-01 6:39 ` Yoshihiro Shimoda
2019-11-01 10:09 ` Eugeniu Rosca
2019-11-01 10:45 ` Andrew Murray
2019-11-05 1:16 ` Yoshihiro Shimoda
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