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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: linux-pci@vger.kernel.org, Rob Herring <robh@kernel.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Gustavo Pimentel <gustavo.pimentel@synopsys.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Jingoo Han <jingoohan1@gmail.com>,
	Vidya Sagar <vidyas@nvidia.com>
Subject: Re: [PATCH] PCI: dwc: Support multiple ATU memory regions
Date: Wed, 18 Nov 2020 16:06:18 +0000	[thread overview]
Message-ID: <160571541071.4535.5411939926220228556.b4-ty@arm.com> (raw)
In-Reply-To: <20201026181652.418729-1-robh@kernel.org>

On Mon, 26 Oct 2020 13:16:52 -0500, Rob Herring wrote:
> The current ATU setup only supports a single memory resource which
> isn't sufficient if there are also prefetchable memory regions. In order
> to support multiple memory regions, we need to move away from fixed ATU
> slots and rework the assignment. As there's always an ATU entry for
> config space, let's assign index 0 to config space. Then we assign
> memory resources to index 1 and up. Finally, if we have an I/O region
> and slots remaining, we assign the I/O region last. If there aren't
> remaining slots, we keep the same config and I/O space sharing.

Applied to pci/dwc, thanks!

[1/1] PCI: dwc: Support multiple ATU memory regions
      https://git.kernel.org/lpieralisi/pci/c/9f9e59a480

Thanks,
Lorenzo

      parent reply	other threads:[~2020-11-18 16:06 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-26 18:16 Rob Herring
2020-10-27 10:05 ` Vidya Sagar
2020-10-27 14:29 ` Jingoo Han
2020-11-18 16:06 ` Lorenzo Pieralisi [this message]

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