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From: Megha Dey <>
Subject: [PATCH 04/12] genirq/proc: Take buslock on affinity write
Date: Wed,  3 Feb 2021 12:56:37 -0800	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

From: Thomas Gleixner <>

Until now interrupt chips which support setting affinity are not locking
the associated bus lock for two reasons:

 - All chips which support affinity setting do not use buslock because they
   just can operated directly on the hardware.

 - All chips which use buslock do not support affinity setting because
   their interrupt chips are not capable. These chips are usually connected
   over a bus like I2C, SPI etc. and have an interrupt output which is
   conneted to CPU interrupt of some sort. So there is no way to set the
   affinity on the chip itself.

Upcoming hardware which is PCIE based sports a non standard MSI(X) variant
which stores the MSI message in RAM which is associated to e.g. a device
queue. The device manages this RAM and writes have to be issued via command
queues or similar mechanisms which is obviously not possible from interrupt
disabled, raw spinlock held context.

The buslock mechanism of irq chips can be utilized to support that. The
affinity write to the chip writes to shadow state, marks it pending and the
irq chip's irq_bus_sync_unlock() callback handles the command queue and
wait for completion similar to the other chip operations on I2C or SPI

Change the locking in irq_set_affinity() to bus_lock/unlock to help with
that. There are a few other callers than the proc interface, but none of
them is affected by this change as none of them affects an irq chip with
bus lock support.

Signed-off-by: Thomas Gleixner <>
Signed-off-by: Megha Dey <>
 kernel/irq/manage.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index dec3f73..85ede4e 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -443,16 +443,16 @@ int irq_update_affinity_desc(unsigned int irq,
 int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
-	struct irq_desc *desc = irq_to_desc(irq);
+	struct irq_desc *desc;
 	unsigned long flags;
 	int ret;
+	desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
 	if (!desc)
 		return -EINVAL;
-	raw_spin_lock_irqsave(&desc->lock, flags);
 	ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
-	raw_spin_unlock_irqrestore(&desc->lock, flags);
+	irq_put_desc_busunlock(desc, flags);
 	return ret;

  parent reply	other threads:[~2021-02-03 21:02 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-02-03 20:56 [PATCH 00/12] Introduce dev-msi and interrupt message store Megha Dey
2021-02-03 20:56 ` [PATCH 01/12] x86/irq: Add DEV_MSI allocation type Megha Dey
2021-02-03 20:56 ` [PATCH 02/12] x86/msi: Rename and rework pci_msi_prepare() to cover non-PCI MSI Megha Dey
2021-02-03 20:56 ` [PATCH 03/12] platform-msi: Provide default irq_chip:: Ack Megha Dey
2021-02-03 20:56 ` Megha Dey [this message]
2021-02-03 20:56 ` [PATCH 05/12] genirq/msi: Provide and use msi_domain_set_default_info_flags() Megha Dey
2021-02-03 20:56 ` [PATCH 06/12] platform-msi: Add device MSI infrastructure Megha Dey
2021-02-03 20:56 ` [PATCH 07/12] irqdomain/msi: Provide msi_alloc/free_store() callbacks Megha Dey
2021-02-03 20:56 ` [PATCH 08/12] genirq: Set auxiliary data for an interrupt Megha Dey
2021-02-03 20:56 ` [PATCH 09/12] iommu/vt-d: Add DEV-MSI support Megha Dey
2021-02-03 20:56 ` [PATCH 10/12] iommu: Add capability IOMMU_CAP_VIOMMU_HINT Megha Dey
2021-02-03 20:56 ` [PATCH 11/12] platform-msi: Add platform check for subdevice irq domain Megha Dey
2021-02-04 12:14   ` Jason Gunthorpe
2021-02-04 13:22     ` Lu Baolu
2021-02-08  8:21   ` Leon Romanovsky
2021-02-09  0:36     ` Lu Baolu
2021-02-03 20:56 ` [PATCH 12/12] irqchip: Add IMS (Interrupt Message Store) driver Megha Dey

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