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From: Richard Zhu <>
	Richard Zhu <>
Subject: [PATCH 2/3] arm64: dts: add one property to specify the imx8mq pcie phy voltage
Date: Fri, 19 Mar 2021 16:24:06 +0800	[thread overview]
Message-ID: <> (raw)
In-Reply-To: <>

Both 1.8v and 3.3v power supplies can be feeded to i.MX8MQ PCIe PHY.
In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data
sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design,
the VREG_BYPASS bits of GPR registers should be cleared from default
value 1b'1 to 1b'0.

Signed-off-by: Richard Zhu <>
 arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 85b045253a0e..30bcf5f583e0 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -318,6 +318,7 @@
 		 <&clk IMX8MQ_CLK_PCIE1_PHY>,
 	clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+	pcie-vph-3v3;
 	status = "okay";

  reply	other threads:[~2021-03-19  8:38 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-19  8:24 [PATCH 1/3] dt-bindings: imx6q-pcie: specify the imx8mq pcie phy voltage Richard Zhu
2021-03-19  8:24 ` Richard Zhu [this message]
2021-03-19  8:24 ` [PATCH 3/3] PCI: imx: clear vreg bypass when pcie vph voltage is 3v3 Richard Zhu
2021-03-19  9:49 ` [PATCH 1/3] dt-bindings: imx6q-pcie: specify the imx8mq pcie phy voltage Lucas Stach

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