From: Zhangfei Gao <zhangfei.gao@linaro.org>
To: Bjorn Helgaas <bhelgaas@google.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Arnd Bergmann <arnd@arndb.de>,
jean-philippe <jean-philippe@linaro.org>,
kenneth-lee-2012@foxmail.com, Wangzhou <wangzhou1@hisilicon.com>
Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
Zhangfei Gao <zhangfei.gao@linaro.org>
Subject: [PATCH v5 2/3] PCI: Add a quirk to set pasid_no_tlp for HiSilicon chips
Date: Tue, 13 Jul 2021 10:54:35 +0800 [thread overview]
Message-ID: <1626144876-11352-3-git-send-email-zhangfei.gao@linaro.org> (raw)
In-Reply-To: <1626144876-11352-1-git-send-email-zhangfei.gao@linaro.org>
HiSilicon KunPeng920 and KunPeng930 have devices appear as PCI but are
actually on the AMBA bus. These fake PCI devices have PASID capability
though not supporting TLP.
Add a quirk to set pasid_no_tlp for these devices.
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
---
drivers/pci/quirks.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6d74386..5d46ac6 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1821,6 +1821,20 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quir
DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_HUAWEI, 0x1610, PCI_CLASS_BRIDGE_PCI, 8, quirk_pcie_mch);
+static void quirk_huawei_pcie_sva(struct pci_dev *pdev)
+{
+ if (pdev->revision != 0x21 && pdev->revision != 0x30)
+ return;
+
+ pdev->pasid_no_tlp = 1;
+}
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
+
/*
* It's possible for the MSI to get corrupted if SHPC and ACPI are used
* together on certain PXH-based systems.
--
2.7.4
next prev parent reply other threads:[~2021-07-13 2:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-13 2:54 [PATCH v5 0/3] PCI: Add a quirk to enable SVA for HiSilicon chip Zhangfei Gao
2021-07-13 2:54 ` [PATCH v5 1/3] PCI: PASID can be enabled without TLP prefix Zhangfei Gao
2021-07-13 2:54 ` Zhangfei Gao [this message]
2021-07-13 2:54 ` [PATCH v5 3/3] PCI: Set dma-can-stall for HiSilicon chips Zhangfei Gao
2021-08-26 18:26 ` Bjorn Helgaas
2021-08-26 19:12 ` Robin Murphy
2021-08-31 14:38 ` Will Deacon
2021-07-27 6:47 ` [PATCH v5 0/3] PCI: Add a quirk to enable SVA for HiSilicon chip Zhangfei Gao
2021-08-23 1:02 ` Zhangfei Gao
2021-08-04 1:33 ` Zhou Wang
2021-08-26 19:30 ` Bjorn Helgaas
2021-08-27 1:02 ` Zhangfei Gao
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