From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com,
lorenzo.pieralisi@arm.com, marcel.ziswiler@toradex.com,
tharvey@gateworks.com, kishon@ti.com, vkoul@kernel.org,
robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org
Cc: hongxing.zhu@nxp.com, linux-phy@lists.infradead.org,
devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: [PATCH v6 7/8] arm64: dts: imx8mm-evk: Add the pcie support on imx8mm evk board
Date: Thu, 18 Nov 2021 09:54:48 +0800 [thread overview]
Message-ID: <1637200489-11855-8-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1637200489-11855-1-git-send-email-hongxing.zhu@nxp.com>
Add the PCIe support on iMX8MM EVK boards.
And set the default reference clock mode.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
---
arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
index e033d0257b5a..87a30daf0b3c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi
@@ -5,6 +5,7 @@
/dts-v1/;
+#include <dt-bindings/phy/phy-imx8-pcie.h>
#include <dt-bindings/usb/pd.h>
#include "imx8mm.dtsi"
@@ -30,6 +31,23 @@ status {
};
};
+ pcie0_refclk: pcie0-refclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <100000000>;
+ };
+
+ reg_pcie0: regulator-pcie {
+ compatible = "regulator-fixed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0_reg>;
+ regulator-name = "MPCIE_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
reg_usdhc2_vmmc: regulator-usdhc2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
@@ -289,6 +307,30 @@ pca6416: gpio@20 {
};
};
+&pcie_phy {
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
+ fsl,tx-deemph-gen1 = <0x2d>;
+ fsl,tx-deemph-gen2 = <0xf>;
+ clocks = <&pcie0_refclk>;
+ status = "okay";
+};
+
+&pcie0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pcie0>;
+ reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
+ clocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&pcie0_refclk>;
+ clock-names = "pcie", "pcie_aux", "pcie_bus";
+ assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
+ <&clk IMX8MM_CLK_PCIE1_CTRL>;
+ assigned-clock-rates = <10000000>, <250000000>;
+ assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
+ <&clk IMX8MM_SYS_PLL2_250M>;
+ vpcie-supply = <®_pcie0>;
+ status = "okay";
+};
+
&sai3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai3>;
@@ -406,6 +448,19 @@ MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400001c3
>;
};
+ pinctrl_pcie0: pcie0grp {
+ fsl,pins = <
+ MX8MM_IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B 0x61
+ MX8MM_IOMUXC_SAI2_RXFS_GPIO4_IO21 0x41
+ >;
+ };
+
+ pinctrl_pcie0_reg: pcie0reggrp {
+ fsl,pins = <
+ MX8MM_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x41
+ >;
+ };
+
pinctrl_pmic: pmicirqgrp {
fsl,pins = <
MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x141
--
2.25.1
next prev parent reply other threads:[~2021-11-18 2:21 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-18 1:54 [PATCH v6 0/8] Add the imx8m pcie phy driver and imx8mm pcie support Richard Zhu
2021-11-18 1:54 ` [PATCH v6 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy Richard Zhu
2021-11-18 1:54 ` [PATCH v6 2/8] dt-bindings: phy: Add imx8 pcie phy driver support Richard Zhu
2021-11-18 23:50 ` Rob Herring
2021-11-19 1:17 ` Hongxing Zhu
2021-11-18 1:54 ` [PATCH v6 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name properties Richard Zhu
2021-11-18 1:54 ` [PATCH v6 4/8] arm64: dts: imx8mm: Add the pcie phy support Richard Zhu
2021-11-18 1:54 ` [PATCH v6 5/8] phy: freescale: pcie: Initialize the imx8 pcie standalone phy driver Richard Zhu
2021-12-02 4:30 ` Vinod Koul
2021-12-02 5:57 ` Hongxing Zhu
2021-12-02 6:03 ` Vinod Koul
2021-11-18 1:54 ` [PATCH v6 6/8] arm64: dts: imx8mm: Add the pcie support Richard Zhu
2021-11-18 1:54 ` Richard Zhu [this message]
2021-11-18 1:54 ` [PATCH v6 8/8] PCI: imx: Add the imx8mm " Richard Zhu
2021-12-01 12:44 ` [PATCH v6 0/8] Add the imx8m pcie phy driver and " Lorenzo Pieralisi
2021-12-02 5:43 ` Hongxing Zhu
2021-12-02 6:03 ` Vinod Koul
2021-12-03 2:12 ` Hongxing Zhu
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