* [PATCH v3] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize
@ 2021-12-27 13:31 qizhong cheng
2022-01-07 10:22 ` Lorenzo Pieralisi
0 siblings, 1 reply; 2+ messages in thread
From: qizhong cheng @ 2021-12-27 13:31 UTC (permalink / raw)
To: Ryder Lee, Jianjun Wang, Lorenzo Pieralisi,
Krzysztof Wilczyński, Bjorn Helgaas
Cc: linux-pci, linux-mediatek, linux-kernel, linux-arm-kernel,
qizhong.cheng, chuanjia.liu, Pali Rohár
Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
be delayed 100ms (TPVPERL) for the power and clock to become stable.
Signed-off-by: qizhong cheng <qizhong.cheng@mediatek.com>
Acked-by: Pali Rohár <pali@kernel.org>
---
v3:
- Change subject.
v2:
- Typo fix.
- Rewrap into one paragraph.
drivers/pci/controller/pcie-mediatek.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index 2f3f974977a3..b18935e8da89 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -702,6 +702,13 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
*/
writel(PCIE_LINKDOWN_RST_EN, port->base + PCIE_RST_CTRL);
+ /*
+ * Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
+ * 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
+ * be delayed 100ms (TPVPERL) for the power and clock to become stable.
+ */
+ msleep(100);
+
/* De-assert PHY, PE, PIPE, MAC and configuration reset */
val = readl(port->base + PCIE_RST_CTRL);
val |= PCIE_PHY_RSTB | PCIE_PERSTB | PCIE_PIPE_SRSTB |
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v3] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize
2021-12-27 13:31 [PATCH v3] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize qizhong cheng
@ 2022-01-07 10:22 ` Lorenzo Pieralisi
0 siblings, 0 replies; 2+ messages in thread
From: Lorenzo Pieralisi @ 2022-01-07 10:22 UTC (permalink / raw)
To: Krzysztof Wilczyński, Jianjun Wang, Ryder Lee,
Bjorn Helgaas, qizhong cheng
Cc: Lorenzo Pieralisi, Pali Rohár, linux-arm-kernel,
chuanjia.liu, linux-mediatek, linux-pci, linux-kernel
On Mon, 27 Dec 2021 21:31:10 +0800, qizhong cheng wrote:
> Described in PCIe CEM specification sections 2.2 (PERST# Signal) and
> 2.2.1 (Initial Power-Up (G3 to S0)). The deassertion of PERST# should
> be delayed 100ms (TPVPERL) for the power and clock to become stable.
>
>
Applied to pci/mediatek, thanks!
[1/1] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize
https://git.kernel.org/lpieralisi/pci/c/65ace9a85f
Thanks,
Lorenzo
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-01-07 10:22 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-12-27 13:31 [PATCH v3] PCI: mediatek: Assert PERST# for 100ms for power and clock to stabilize qizhong cheng
2022-01-07 10:22 ` Lorenzo Pieralisi
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).