From: Richard Zhu <hongxing.zhu@nxp.com>
To: l.stach@pengutronix.de, bhelgaas@google.com, broonie@kernel.org,
lorenzo.pieralisi@arm.com, jingoohan1@gmail.com,
festevam@gmail.com, francesco.dolcini@toradex.com
Cc: hongxing.zhu@nxp.com, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kernel@pengutronix.de,
linux-imx@nxp.com
Subject: [PATCH v7 4/8] PCI: imx6: Disable iMX6QDL PCIe REF clock when disable PCIe clocks
Date: Wed, 16 Feb 2022 14:20:59 +0800 [thread overview]
Message-ID: <1644992463-14467-5-git-send-email-hongxing.zhu@nxp.com> (raw)
In-Reply-To: <1644992463-14467-1-git-send-email-hongxing.zhu@nxp.com>
When disable PCIe clocks, disable i.MX6QDL PCIe REF clock too.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index e157f0bec37e..0aca762d88a3 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -540,6 +540,14 @@ static void imx6_pcie_clk_disable(struct imx6_pcie *imx6_pcie)
clk_disable_unprepare(imx6_pcie->pcie_bus);
switch (imx6_pcie->drvdata->variant) {
+ case IMX6Q:
+ case IMX6QP:
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+ IMX6Q_GPR1_PCIE_REF_CLK_EN, 0);
+ regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
+ IMX6Q_GPR1_PCIE_TEST_PD,
+ IMX6Q_GPR1_PCIE_TEST_PD);
+ break;
case IMX6SX:
clk_disable_unprepare(imx6_pcie->pcie_inbound_axi);
break;
--
2.25.1
next prev parent reply other threads:[~2022-02-16 7:18 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-16 6:20 [PATCH v7 0/8] PCI: imx6: refine codes and add compliance tests mode support Richard Zhu
2022-02-16 6:20 ` [PATCH v7 1/8] PCI: imx6: Encapsulate the clock enable into one standalone function Richard Zhu
2022-02-16 6:20 ` [PATCH v7 2/8] PCI: imx6: Add the error propagation from host_init Richard Zhu
2022-02-16 6:20 ` [PATCH v7 3/8] PCI: imx6: Move imx6_pcie_clk_disable() earlier Richard Zhu
2022-02-16 6:20 ` Richard Zhu [this message]
2022-02-16 6:21 ` [PATCH v7 5/8] PCI: imx6: Refine the regulator usage Richard Zhu
2022-02-16 6:21 ` [PATCH v7 6/8] PCI: dwc: Add dw_pcie_host_ops.host_exit() callback Richard Zhu
2022-02-23 17:49 ` Bjorn Helgaas
2022-02-24 7:50 ` Hongxing Zhu
2022-02-16 6:21 ` [PATCH v7 7/8] PCI: imx6: Disable enabled clocks and regulators after link is down Richard Zhu
2022-02-23 17:50 ` Bjorn Helgaas
2022-02-24 7:51 ` Hongxing Zhu
2022-02-16 6:21 ` [PATCH v7 8/8] PCI: imx6: Add the compliance tests mode support Richard Zhu
2022-02-23 17:40 ` Bjorn Helgaas
2022-02-24 7:50 ` Hongxing Zhu
2022-02-24 23:54 ` Bjorn Helgaas
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1644992463-14467-5-git-send-email-hongxing.zhu@nxp.com \
--to=hongxing.zhu@nxp.com \
--cc=bhelgaas@google.com \
--cc=broonie@kernel.org \
--cc=festevam@gmail.com \
--cc=francesco.dolcini@toradex.com \
--cc=jingoohan1@gmail.com \
--cc=kernel@pengutronix.de \
--cc=l.stach@pengutronix.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).