From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
To: helgaas@kernel.org
Cc: linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, mka@chromium.org,
quic_vbadigan@quicinc.com, quic_hemantk@quicinc.com,
quic_nitegupt@quicinc.com, quic_skananth@quicinc.com,
quic_ramkri@quicinc.com, manivannan.sadhasivam@linaro.org,
swboyd@chromium.org, dmitry.baryshkov@linaro.org,
Krishna chaitanya chundru <quic_krichai@quicinc.com>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND
FLATTENED DEVICE TREE BINDINGS)
Subject: [PATCH v4 2/2] dt-bindings: pci: QCOM Add missing sc7280 aggre0, aggre1 clocks
Date: Thu, 8 Sep 2022 14:16:16 +0530 [thread overview]
Message-ID: <1662626776-19636-3-git-send-email-quic_krichai@quicinc.com> (raw)
In-Reply-To: <1662626776-19636-1-git-send-email-quic_krichai@quicinc.com>
Add missing aggre0 and aggre1 clocks.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
changes since v3:
- Changed the order of the clocks.
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index 22a2aac..54f0785 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -56,11 +56,11 @@ properties:
# Platform constraints are described later.
clocks:
minItems: 3
- maxItems: 12
+ maxItems: 13
clock-names:
minItems: 3
- maxItems: 12
+ maxItems: 13
resets:
minItems: 1
@@ -427,8 +427,8 @@ allOf:
then:
properties:
clocks:
- minItems: 11
- maxItems: 11
+ minItems: 13
+ maxItems: 13
clock-names:
items:
- const: pipe # PIPE clock
@@ -442,6 +442,8 @@ allOf:
- const: slave_q2a # Slave Q2A clock
- const: tbu # PCIe TBU clock
- const: ddrss_sf_tbu # PCIe SF TBU clock
+ - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
+ - const: aggre1 # Aggre NoC PCIe1 AXI clock
resets:
maxItems: 1
reset-names:
--
2.7.4
next prev parent reply other threads:[~2022-09-08 8:47 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-08 8:46 [PATCH v4 0/2] PCI: qcom: sc7280: add missing aggre0 and aggre1 clocks Krishna chaitanya chundru
2022-09-08 8:46 ` [PATCH v4 1/2] arm64: dts: qcom: sc7280: Add missing aggre0, " Krishna chaitanya chundru
2022-09-08 10:52 ` Krzysztof Kozlowski
2022-09-08 8:46 ` Krishna chaitanya chundru [this message]
2022-09-08 10:52 ` [PATCH v4 2/2] dt-bindings: pci: QCOM Add missing sc7280 " Krzysztof Kozlowski
2022-09-15 3:37 ` [PATCH v4 0/2] PCI: qcom: sc7280: add missing aggre0 and " Bjorn Andersson
2022-09-27 9:23 ` (subset) " Lorenzo Pieralisi
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