From: Krishna chaitanya chundru <quic_krichai@quicinc.com>
To: manivannan.sadhasivam@linaro.org
Cc: helgaas@kernel.org, linux-pci@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
quic_vbadigan@quicinc.com, quic_nitegupt@quicinc.com,
quic_skananth@quicinc.com, quic_ramkri@quicinc.com,
quic_parass@quicinc.com, krzysztof.kozlowski@linaro.org,
"Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>
Subject: [PATCH v5 3/5] PCI: qcom-ep: Add wake up host op to dw_pcie_ep_ops
Date: Wed, 2 Aug 2023 10:29:17 +0530 [thread overview]
Message-ID: <1690952359-8625-4-git-send-email-quic_krichai@quicinc.com> (raw)
In-Reply-To: <1690952359-8625-1-git-send-email-quic_krichai@quicinc.com>
Add wakeup host op to dw_pcie_ep_ops to wake up host.
If the wakeup type is PME, then trigger inband PME by writing to the PARF
PARF_PM_CTRL register, otherwise toggle #WAKE.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
---
drivers/pci/controller/dwc/pcie-qcom-ep.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c
index 0c69a61..e78a74a1 100644
--- a/drivers/pci/controller/dwc/pcie-qcom-ep.c
+++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c
@@ -89,6 +89,7 @@
/* PARF_PM_CTRL register fields */
#define PARF_PM_CTRL_REQ_EXIT_L1 BIT(1)
#define PARF_PM_CTRL_READY_ENTR_L23 BIT(2)
+#define PARF_PM_CTRL_XMT_PME BIT(4)
#define PARF_PM_CTRL_REQ_NOT_ENTR_L1 BIT(5)
/* PARF_MHI_CLOCK_RESET_CTRL fields */
@@ -730,10 +731,35 @@ static void qcom_pcie_ep_init(struct dw_pcie_ep *ep)
dw_pcie_ep_reset_bar(pci, bar);
}
+static bool qcom_pcie_ep_wakeup_host(struct dw_pcie_ep *ep, u8 func_no, bool send_pme)
+{
+ struct dw_pcie *pci = to_dw_pcie_from_ep(ep);
+ struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci);
+ struct device *dev = pci->dev;
+ u32 val;
+
+ if (send_pme) {
+ dev_dbg(dev, "Waking up the host using PME\n");
+ val = readl_relaxed(pcie_ep->parf + PARF_PM_CTRL);
+ writel_relaxed(val | PARF_PM_CTRL_XMT_PME, pcie_ep->parf + PARF_PM_CTRL);
+ writel_relaxed(val, pcie_ep->parf + PARF_PM_CTRL);
+
+ } else {
+ dev_dbg(dev, "Waking up the host by toggling WAKE#\n");
+ gpiod_set_value_cansleep(pcie_ep->wake, 1);
+ usleep_range(WAKE_DELAY_US, WAKE_DELAY_US + 500);
+ gpiod_set_value_cansleep(pcie_ep->wake, 0);
+
+ }
+
+ return true;
+}
+
static const struct dw_pcie_ep_ops pci_ep_ops = {
.ep_init = qcom_pcie_ep_init,
.raise_irq = qcom_pcie_ep_raise_irq,
.get_features = qcom_pcie_epc_get_features,
+ .wakeup_host = qcom_pcie_ep_wakeup_host,
};
static int qcom_pcie_ep_probe(struct platform_device *pdev)
--
2.7.4
next prev parent reply other threads:[~2023-08-02 4:59 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-02 4:59 [PATCH v5 0/5] PCI: EPC: Add support to wake up host from D3 states Krishna chaitanya chundru
2023-08-02 4:59 ` [PATCH v5 1/5] PCI: endpoint: Add wakeup host API to EPC core Krishna chaitanya chundru
2023-08-02 4:59 ` [PATCH v5 2/5] PCI: dwc: Add wakeup host op to pci_epc_ops Krishna chaitanya chundru
2023-08-02 4:59 ` Krishna chaitanya chundru [this message]
2023-08-02 4:59 ` [PATCH v5 4/5] PCI: epf-mhi: Add wakeup host op Krishna chaitanya chundru
2023-08-02 4:59 ` [PATCH v5 5/5] bus: mhi: ep: wake up host if the MHI state is in M3 Krishna chaitanya chundru
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