From: Kishon Vijay Abraham I <kishon@ti.com>
To: Vidya Sagar <vidyas@nvidia.com>, <lorenzo.pieralisi@arm.com>,
<bhelgaas@google.com>, <robh+dt@kernel.org>,
<mark.rutland@arm.com>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <catalin.marinas@arm.com>,
<will.deacon@arm.com>, <jingoohan1@gmail.com>,
<gustavo.pimentel@synopsys.com>
Cc: <digetx@gmail.com>, <mperttunen@nvidia.com>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <sagar.tv@gmail.com>
Subject: Re: [PATCH V10 10/15] dt-bindings: PHY: P2U: Add Tegra194 P2U block
Date: Thu, 20 Jun 2019 12:52:16 +0530 [thread overview]
Message-ID: <1ecf61d7-5535-4f07-5e1e-5d492f4194da@ti.com> (raw)
In-Reply-To: <20190612095339.20118-11-vidyas@nvidia.com>
On 12/06/19 3:23 PM, Vidya Sagar wrote:
> Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
> module instantiated one for each PCIe lane between Synopsys DesignWare core
> based PCIe IP and Universal PHY block.
>
> Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
> Reviewed-by: Rob Herring <robh@kernel.org>
> Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
> Changes since [v9]:
> * None
>
> Changes since [v8]:
> * None
>
> Changes since [v7]:
> * None
>
> Changes since [v6]:
> * None
>
> Changes since [v5]:
> * Added Sob
> * Changed node name from "p2u@xxxxxxxx" to "phy@xxxxxxxx"
>
> Changes since [v4]:
> * None
>
> Changes since [v3]:
> * None
>
> Changes since [v2]:
> * Changed node label to reflect new format that includes either 'hsio' or
> 'nvhs' in its name to reflect which UPHY brick they belong to
>
> Changes since [v1]:
> * This is a new patch in v2 series
>
> .../bindings/phy/phy-tegra194-p2u.txt | 28 +++++++++++++++++++
> 1 file changed, 28 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt
>
> diff --git a/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt
> new file mode 100644
> index 000000000000..d23ff90baad5
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/phy-tegra194-p2u.txt
> @@ -0,0 +1,28 @@
> +NVIDIA Tegra194 P2U binding
> +
> +Tegra194 has two PHY bricks namely HSIO (High Speed IO) and NVHS (NVIDIA High
> +Speed) each interfacing with 12 and 8 P2U instances respectively.
> +A P2U instance is a glue logic between Synopsys DesignWare Core PCIe IP's PIPE
> +interface and PHY of HSIO/NVHS bricks. Each P2U instance represents one PCIe
> +lane.
> +
> +Required properties:
> +- compatible: For Tegra19x, must contain "nvidia,tegra194-p2u".
> +- reg: Should be the physical address space and length of respective each P2U
> + instance.
> +- reg-names: Must include the entry "ctl".
> +
> +Required properties for PHY port node:
> +- #phy-cells: Defined by generic PHY bindings. Must be 0.
> +
> +Refer to phy/phy-bindings.txt for the generic PHY binding properties.
> +
> +Example:
> +
> +p2u_hsio_0: phy@3e10000 {
> + compatible = "nvidia,tegra194-p2u";
> + reg = <0x03e10000 0x10000>;
> + reg-names = "ctl";
> +
> + #phy-cells = <0>;
> +};
>
next prev parent reply other threads:[~2019-06-20 7:24 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-12 9:53 [PATCH V10 00/15] Add Tegra194 PCIe support Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 01/15] PCI: Add #defines for some of PCIe spec r4.0 features Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 02/15] PCI: Disable MSI for Tegra194 root port Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 03/15] PCI: dwc: Perform dbi regs write lock towards the end Vidya Sagar
2019-06-18 6:34 ` Jingoo Han
2019-06-12 9:53 ` [PATCH V10 04/15] PCI: dwc: Move config space capability search API Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 05/15] PCI: dwc: Add ext " Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 06/15] dt-bindings: PCI: designware: Add binding for CDM register check Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 07/15] PCI: dwc: Add support to enable " Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 08/15] dt-bindings: Add PCIe supports-clkreq property Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 09/15] dt-bindings: PCI: tegra: Add device tree support for Tegra194 Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 10/15] dt-bindings: PHY: P2U: Add Tegra194 P2U block Vidya Sagar
2019-06-20 7:22 ` Kishon Vijay Abraham I [this message]
2019-06-12 9:53 ` [PATCH V10 11/15] arm64: tegra: Add P2U and PCIe controller nodes to Tegra194 DT Vidya Sagar
2019-06-20 10:55 ` Thierry Reding
2019-06-24 7:32 ` Vidya Sagar
2019-06-25 7:33 ` Thierry Reding
2019-06-12 9:53 ` [PATCH V10 12/15] arm64: tegra: Enable PCIe slots in P2972-0000 board Vidya Sagar
2019-06-20 11:01 ` Thierry Reding
2019-06-12 9:53 ` [PATCH V10 13/15] phy: tegra: Add PCIe PIPE2UPHY support Vidya Sagar
2019-06-20 7:24 ` Kishon Vijay Abraham I
2019-06-20 23:23 ` Dmitry Osipenko
2019-06-22 17:56 ` Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 14/15] PCI: tegra: Add Tegra194 PCIe support Vidya Sagar
2019-06-12 9:53 ` [PATCH V10 15/15] arm64: Add Tegra194 PCIe driver to defconfig Vidya Sagar
2019-06-20 11:03 ` Thierry Reding
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