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13 Nov 2018 18:31:16 -0600 Received: from pps.filterd (m0144102.ppops.net [127.0.0.1]) by mx0b-00154901.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id wAE0SQm0030403; Tue, 13 Nov 2018 19:31:17 -0500 Received: from esa2.dell-outbound2.iphmx.com (esa2.dell-outbound2.iphmx.com [68.232.153.202]) by mx0b-00154901.pphosted.com with ESMTP id 2nr7cb0ehe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 13 Nov 2018 19:31:17 -0500 Cc: , , , , , , , , , , , , Received: from ausxippc106.us.dell.com ([143.166.85.156]) by esa2.dell-outbound2.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA256; 14 Nov 2018 06:31:00 +0600 X-LoopCount0: from 10.166.134.87 X-IronPort-AV: E=Sophos;i="5.56,230,1539666000"; d="scan'208";a="318281823" From: To: Subject: Re: [PATCH v2] PCI/MSI: Don't touch MSI bits when the PCI device is disconnected Thread-Topic: [PATCH v2] PCI/MSI: Don't touch MSI bits when the PCI device is disconnected Thread-Index: AQHUT50UQ290XPGvJEGnaSTTjbCF+g== Date: Wed, 14 Nov 2018 00:31:13 +0000 Message-ID: <1f7776f2901b40368c847353b74a8cf7@ausx13mps321.AMER.DELL.COM> References: <20181108220117.GA11466@kroah.com> <20181108223258.GD2932@localhost.localdomain> <20181108224255.GA20619@kroah.com> <20d68e586fff4dcca5616d5056f6fc21@ausx13mps321.AMER.DELL.COM> <20181108225109.GA3023@kroah.com> <16bf9d14bc5f4a90b2b88dd2eb165186@ausx13mps321.AMER.DELL.COM> <5da8d8aa9f3818af649b1ac547bc4e6062626ddf.camel@gmail.com> <20181113050240.GA182139@google.com> <19136f44cd5c45e79bbef7e78a6bf332@ausx13mps321.AMER.DELL.COM> <20181113225232.GB10134@localhost.localdomain> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.177.49.166] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-11-13_17:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1811140002 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On 11/13/2018 04:56 PM, Keith Busch wrote:=0A= > On Tue, Nov 13, 2018 at 10:39:15PM +0000, Alex_Gagniuc@Dellteam.com wrote= :=0A= >> On 11/12/2018 11:02 PM, Bjorn Helgaas wrote:=0A= >>> The whole issue of firmware-first, the mechanism by which firmware=0A= >>> gets control, the System Error enables in Root Port Root Control=0A= >>> registers, etc., is very murky to me. Jon has a sort of similar issue= =0A= >>> with VMD where he needs to leave System Errors enabled instead of=0A= >>> disabling them as we currently do.=0A= >>=0A= >> Well, OS gets control via _OSC method, and based on that it should=0A= >> touch/not touch the AER bits. The bits that get set/cleared come from=0A= >> _HPX method, and there's a more about the FFS described in ACPI spec. It= =0A= >> seems that if platform, wants to enable VMD, it should pass the correct= =0A= >> bits via _HPX. I'm curious to know in what new twisted way FFS doesn't= =0A= >> work as intended.=0A= > =0A= > When VMD is enabled, the platform sees a VMD endpoint. It doesn't see=0A= > any of the root ports on that domain, so ACPI can't provide policies for= =0A= > them nor AER registers for the platform to consider controlling.=0A= =0A= I'm not understanding the interdependency between RP AER settings and =0A= VMD. My understanding of VMD is quite rudimentary though, so I'll take =0A= your word for it.=0A= =0A= Alex=0A= =0A=