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Date: Wed, 29 Oct 2014 09:48:44 -0500
From: Felipe Balbi <balbi@ti.com>
To: Huang Rui <ray.huang@amd.com>
CC: Felipe Balbi <balbi@ti.com>,
	Alan Stern <stern@rowland.harvard.edu>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
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Subject: Re: [PATCH v3 19/19] usb: dwc3: add support for AMD NL platform
Message-ID: <20141029144844.GK11572@saruman>
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 <20141028133856.GB8123@saruman>
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On Wed, Oct 29, 2014 at 10:33:19PM +0800, Huang Rui wrote:
> On Wed, Oct 29, 2014 at 09:11:46AM -0500, Felipe Balbi wrote:
> > On Wed, Oct 29, 2014 at 05:13:43PM +0800, Huang Rui wrote:
> > > Hi Felipe, Paul,
> > >=20
> > > On Tue, Oct 28, 2014 at 10:35:37PM +0800, Huang Rui wrote:
> > > > On Tue, Oct 28, 2014 at 08:38:56AM -0500, Felipe Balbi wrote:
> > >=20
> > > <snip>
> > >=20
> > > > >=20
> > > > > however, as I mentioned before, the core shouldn't have to know t=
hat
> > > > > it's running on an AMD platform. We already support several diffe=
rent
> > > > > platforms (OMAP5, AM437x, DRA7xx, Exynos5, Exynos7, Qcom, Merrifi=
eld,
> > > > > Baytrail, Braswell, HAPS PCIe, and STiH407) and none of them get =
their
> > > > > $my_awesome_platform flag in dwc3, why should AMD be any differen=
t ?
> > > > >=20
> > > > > This is the only part of $subject that I cannot accept because it=
 would
> > > > > mean we would be giving AMD a special treatment when there should=
n't be
> > > > > any, for anybody.
> > > > >=20
> > > >=20
> > > > That's because I used this flag to enable below quirks on AMD NL FP=
GA
> > > > board, and FPGA flag only can be detected on core. Can I set
> > > > disable_scramble_quirk, dis_u3_susphy_quirk, and dis_u2_susphy_quirk
> > > > for all the FPGA platforms?
> > > >=20
> > > > if (dwc->amd_nl_plat && dwc->is_fpga) {
> > > >         dwc->disable_scramble_quirk =3D true;
> > > >         dwc->dis_u3_susphy_quirk =3D true;
> > > >         dwc->dis_u2_susphy_quirk =3D true;
> > > > }
> > > >=20
> > >=20
> > > I confirmed with HW designer, these three quirks only will be needed
> > > on FPGA board. And these should *not* be used on non-FPGA board, as y=
ou
> > > known.
> > >=20
> > > So I would like to use below conditions on dwc3 core. When I set these
> > > quirk flags in pci glue layer, then core can filter them by is_fpga
> > > flag to support both on FPGA and SoC. Is there any concern? If that, I
> > > should remove WARN_ONCE at disable_scramble flag.
> > >=20
> > > if (dwc->disable_scramble_quirk && dwc->is_fpga) {..}
> > >=20
> > > if (dwc->dis_u2_susphy_quirk && dwc->is_fpga) {..}
> > >=20
> > > if (dwc->dis_u3_susphy_quirk && dwc->is_fpga) {..}
> >=20
> > the problem is that somebody might need this on non-FPGA. Currently,
> > only AMD needs these and only on FPGA, but you never know.
> >=20
> > I guess we can add it like this for now and once we have a real AMD
> > product, we drop FPGA support from AMD.
> >=20
>=20
> OK, agree.
>=20
> Then I comments below WARN_ONCE, OK?
>=20
> /* FIXME it should be used after AMD NL product taps out */
> #if 0
> WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga,
> "disable_scramble cannot be used on non-FPGA builds\n");
> #endif

just remove it, we don't like commented out code.

--=20
balbi

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