linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Wei Yang <weiyang@linux.vnet.ibm.com>
To: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH V7 04/10] powerpc/eeh: Trace first 7 BARs in address cache
Date: Wed, 3 Jun 2015 09:47:42 +0800	[thread overview]
Message-ID: <20150603014742.GC7387@richard> (raw)
In-Reply-To: <20150602041124.GA19672@gwshan>

On Tue, Jun 02, 2015 at 02:11:24PM +1000, Gavin Shan wrote:
>On Tue, Jun 02, 2015 at 11:51:15AM +0800, Wei Yang wrote:
>>On Mon, Jun 01, 2015 at 06:32:33PM -0500, Bjorn Helgaas wrote:
>>>The subject says "Trace first 7 BARs..."  I think maybe you meant "Track
>>>first 7 BARs" or maybe "Cache only BARs, not windows or IOV BARs"
>>>
>>
>>Agree, Track is more accurate.
>>
>>Gavin,
>>
>>Which subject you prefer?
>>
>
>"Cache only BARs, not windows or IOV BARs" is better.
>
>>>On Tue, May 19, 2015 at 06:50:06PM +0800, Wei Yang wrote:
>>>> EEH address cache, which helps to locate the PCI device according to
>>>> the given (physical) MMIO address, didn't cover PCI bridges. 
>>>
>>>"doesn't contain PCI bridge windows"?
>>>
>>>I see that eeh_addr_cache_insert_dev() ignores bridges because it never
>>>calls __eeh_addr_cache_insert_dev() when "(dev->class >> 16) ==
>>>PCI_BASE_CLASS_BRIDGE".  I think it would be more technically correct if
>>>you removed that test and relied on the "i <= PCI_ROM_RESOURCE" test in
>>>this patch, because it is legal (though rare) for bridge devices to have
>>>two BARs, and I assume you would want to put those in your cache if they
>>>exist.
>>>
>>
>>I think this is fine to remove the test "(dev->class >> 16) ==
>>PCI_BASE_CLASS_BRIDGE" for a bridge and rely on the "i <= PCI_ROM_RESOURCE"
>>
>>Gavin,
>>
>>Do you thinks this is fine?
>>
>
>Fine to me.

Thanks, I will change accordingly and do some tests.

>
>>>> Also, it
>>>> shouldn't return PF with address in PF's IOV BARs. Instead, the VFs
>>>> should be returned.
>>>> The patch restricts the address cache to cover first 7 BARs for the
>>>> above purposes.
>>>> 
>>>> [gwshan: changelog]
>>>> Signed-off-by: Wei Yang <weiyang@linux.vnet.ibm.com>
>>>> Acked-by: Gavin Shan <gwshan@linux.vnet.ibm.com>
>>>> ---
>>>>  arch/powerpc/kernel/eeh_cache.c |    2 +-
>>>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>>> 
>>>> diff --git a/arch/powerpc/kernel/eeh_cache.c b/arch/powerpc/kernel/eeh_cache.c
>>>> index eeabeab..f6c5f05 100644
>>>> --- a/arch/powerpc/kernel/eeh_cache.c
>>>> +++ b/arch/powerpc/kernel/eeh_cache.c
>>>> @@ -196,7 +196,7 @@ static void __eeh_addr_cache_insert_dev(struct pci_dev *dev)
>>>>  	}
>>>>  
>>>>  	/* Walk resources on this device, poke them into the tree */
>>>> -	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
>>>> +	for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
>>>>  		unsigned long start = pci_resource_start(dev,i);
>>>>  		unsigned long end = pci_resource_end(dev,i);
>>>>  		unsigned int flags = pci_resource_flags(dev,i);
>>>> -- 
>>>> 1.7.9.5
>>>> 
>>
>>-- 
>>Richard Yang
>>Help you, Help me

-- 
Richard Yang
Help you, Help me


  reply	other threads:[~2015-06-03  1:49 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-19  1:35 [PATCH V6 00/10] VF EEH on Power8 Wei Yang
2015-05-19  1:35 ` [PATCH V6 01/10] PCI/IOV: Rename and export virtfn_add/virtfn_remove Wei Yang
2015-05-19  5:24   ` Wei Yang
2015-05-19  1:35 ` [PATCH V6 02/10] powerpc/pci: Cache VF index in pci_dn Wei Yang
2015-05-19  1:35 ` [PATCH V6 03/10] powerpc/pci: Remove VFs prior to PF Wei Yang
2015-05-19  1:35 ` [PATCH V6 04/10] powerpc/eeh: Trace first 7 BARs in address cache Wei Yang
2015-05-19  1:35 ` [PATCH V6 05/10] powerpc/powernv: EEH device for VF Wei Yang
2015-05-19  1:35 ` [PATCH V6 06/10] powerpc/eeh: Create PE for VFs Wei Yang
2015-05-19  1:35 ` [PATCH V6 07/10] powerpc/powernv: Support EEH reset for VF PE Wei Yang
2015-05-19  1:35 ` [PATCH V6 08/10] powerpc/powernv: Support PCI config restore for VFs Wei Yang
2015-05-19  1:35 ` [PATCH V6 09/10] powerpc/eeh: Support error recovery for VF PE Wei Yang
2015-05-19  1:35 ` [PATCH V6 10/10] powerpc/powernv: compound PE for VFs Wei Yang
2015-05-19 10:50 ` [PATCH V7 00/10] VF EEH on Power8 Wei Yang
2015-05-19 10:50   ` [PATCH V7 01/10] PCI/IOV: Rename and export virtfn_add/virtfn_remove Wei Yang
2015-06-02 17:19     ` Bjorn Helgaas
2015-06-03  1:38       ` Wei Yang
2015-05-19 10:50   ` [PATCH V7 02/10] powerpc/pci: Cache VF index in pci_dn Wei Yang
2015-05-19 10:50   ` [PATCH V7 03/10] powerpc/pci: Remove VFs prior to PF Wei Yang
2015-06-01 23:20     ` Bjorn Helgaas
2015-06-02  3:44       ` Wei Yang
2015-05-19 10:50   ` [PATCH V7 04/10] powerpc/eeh: Trace first 7 BARs in address cache Wei Yang
2015-06-01 23:32     ` Bjorn Helgaas
2015-06-02  3:51       ` Wei Yang
2015-06-02  4:11         ` Gavin Shan
2015-06-03  1:47           ` Wei Yang [this message]
2015-05-19 10:50   ` [PATCH V7 05/10] powerpc/powernv: EEH device for VF Wei Yang
2015-05-19 10:50   ` [PATCH V7 06/10] powerpc/eeh: Create PE for VFs Wei Yang
2015-06-01 23:46     ` Bjorn Helgaas
2015-06-03  3:31       ` Wei Yang
2015-06-03  5:10         ` Gavin Shan
2015-06-03 15:46           ` Bjorn Helgaas
2015-06-04  1:25             ` Gavin Shan
2015-06-04  5:46             ` Wei Yang
2015-06-04  7:10               ` Gavin Shan
2015-06-16  8:50             ` Wei Yang
2015-06-16 13:22               ` Bjorn Helgaas
2015-06-01 23:49     ` Bjorn Helgaas
2015-06-03  3:39       ` Wei Yang
2015-05-19 10:50   ` [PATCH V7 07/10] powerpc/powernv: Support EEH reset for VF PE Wei Yang
2015-05-19 10:50   ` [PATCH V7 08/10] powerpc/powernv: Support PCI config restore for VFs Wei Yang
2015-06-02  0:01     ` Bjorn Helgaas
2015-06-03  1:37       ` Wei Yang
2015-06-03  5:14         ` Gavin Shan
2015-05-19 10:50   ` [PATCH V7 09/10] powerpc/eeh: Support error recovery for VF PE Wei Yang
2015-05-19 10:50   ` [PATCH V7 10/10] powerpc/powernv: compound PE for VFs Wei Yang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20150603014742.GC7387@richard \
    --to=weiyang@linux.vnet.ibm.com \
    --cc=bhelgaas@google.com \
    --cc=gwshan@linux.vnet.ibm.com \
    --cc=linux-pci@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).