From: Bjorn Helgaas <bhelgaas@google.com>
To: Joao Pinto <jpinto@synopsys.com>,
Pratyush Anand <pratyush.anand@gmail.com>
Cc: Jingoo Han <jingoohan1@gmail.com>,
Krzysztof Kozlowski <k.kozlowski@samsung.com>,
Kukjin Kim <kgene@kernel.org>,
linux-samsung-soc@vger.kernel.org, linux-pci@vger.kernel.org
Subject: [PATCH v2 06/10] PCI: designware: Uninline register accessors
Date: Wed, 12 Oct 2016 08:18:31 -0500 [thread overview]
Message-ID: <20161012131831.26443.14261.stgit@bhelgaas-glaptop2.roam.corp.google.com> (raw)
In-Reply-To: <20161012131616.26443.89407.stgit@bhelgaas-glaptop2.roam.corp.google.com>
The register accessors are not performance critical and small enough that
the compiler can inline them itself if it makes sense.
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
---
drivers/pci/host/pcie-designware.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/host/pcie-designware.c b/drivers/pci/host/pcie-designware.c
index b8feea4..7a3458d 100644
--- a/drivers/pci/host/pcie-designware.c
+++ b/drivers/pci/host/pcie-designware.c
@@ -157,14 +157,14 @@ void dw_pcie_writel_rc(struct pcie_port *pp, u32 reg, u32 val)
writel(val, pp->dbi_base + reg);
}
-static inline u32 dw_pcie_readl_unroll(struct pcie_port *pp, u32 index, u32 reg)
+static u32 dw_pcie_readl_unroll(struct pcie_port *pp, u32 index, u32 reg)
{
u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
return dw_pcie_readl_rc(pp, offset + reg);
}
-static inline void dw_pcie_writel_unroll(struct pcie_port *pp, u32 index,
+static void dw_pcie_writel_unroll(struct pcie_port *pp, u32 index,
u32 val, u32 reg)
{
u32 offset = PCIE_GET_ATU_OUTB_UNR_REG_OFFSET(index);
next prev parent reply other threads:[~2016-10-12 13:18 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-12 13:17 [PATCH v2 00/10] PCI: designware: Cleanups Bjorn Helgaas
2016-10-12 13:17 ` [PATCH v2 01/10] PCI: designware: Rename dw_pcie_valid_config() to dw_pcie_valid_device() Bjorn Helgaas
2016-10-12 13:17 ` [PATCH v2 02/10] PCI: designware: Simplify dw_pcie_readl_unroll(), dw_pcie_writel_unroll() Bjorn Helgaas
2016-10-12 13:18 ` [PATCH v2 03/10] PCI: designware: Simplify pcie_host_ops.readl_rc() and .writel_rc() interfaces Bjorn Helgaas
2016-10-12 13:18 ` [PATCH v2 04/10] PCI: designware: Swap order of dw_pcie_writel_rc() reg/val arguments Bjorn Helgaas
2016-10-12 13:18 ` [PATCH v2 05/10] PCI: designware: Export dw_pcie_readl_rc(), dw_pcie_writel_rc() Bjorn Helgaas
2016-10-12 13:18 ` Bjorn Helgaas [this message]
2016-10-12 13:18 ` [PATCH v2 07/10] PCI: designware: Swap order of dw_pcie_writel_unroll() reg/val arguments Bjorn Helgaas
2016-10-12 13:18 ` [PATCH v2 08/10] PCI: designware-plat: Remove redundant dw_plat_pcie.mem_base Bjorn Helgaas
2016-10-12 13:18 ` [PATCH v2 09/10] PCI: designware-plat: Add local struct device pointers Bjorn Helgaas
2016-10-12 13:19 ` [PATCH v2 10/10] PCI: designware-plat: Remove unused platform data Bjorn Helgaas
2016-10-12 16:04 ` [PATCH v2 00/10] PCI: designware: Cleanups Bjorn Helgaas
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