From: Bjorn Helgaas <helgaas@kernel.org>
To: Jim Quinlan <jim2101024@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>,
Linux-MIPS <linux-mips@linux-mips.org>,
linux-pci <linux-pci@vger.kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Kevin Cernekee <cernekee@gmail.com>,
Will Deacon <will.deacon@arm.com>,
linux-kernel@vger.kernel.org, Ralf Baechle <ralf@linux-mips.org>,
Russell King <rmk+kernel@armlinux.org.uk>,
Rob Herring <robh+dt@kernel.org>,
bcm-kernel-feedback-list <bcm-kernel-feedback-list@broadcom.com>,
Gregory Fong <gregory.0xf0@gmail.com>,
Jonas Gorski <jonas.gorski@gmail.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Brian Norris <computersforpeace@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
Christoph Hellwig <hch@lst.de>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver
Date: Fri, 15 Dec 2017 14:14:34 -0600 [thread overview]
Message-ID: <20171215201434.GY30595@bhelgaas-glaptop.roam.corp.google.com> (raw)
In-Reply-To: <CANCKTBvFhHb57JdG01aiSypBAcUeLzY3Dhuh5xP-_F5k_NcAhA@mail.gmail.com>
On Fri, Dec 15, 2017 at 02:53:57PM -0500, Jim Quinlan wrote:
> On Thu, Dec 14, 2017 at 5:51 PM, Bjorn Helgaas <helgaas@kernel.org> wrote:
> > On Wed, Dec 13, 2017 at 06:53:53PM -0500, Jim Quinlan wrote:
> >> On Tue, Dec 12, 2017 at 5:16 PM, Bjorn Helgaas <helgaas@kernel.org> wrote:
> >> > On Tue, Nov 14, 2017 at 05:12:07PM -0500, Jim Quinlan wrote:
> >> >> This commit adds the basic Broadcom STB PCIe controller. Missing is
> >> >> the ability to process MSI and also handle dma-ranges for inbound
> >> >> memory accesses. These two functionalities are added in subsequent
> >> >> commits.
> >> >>
> >> >> The PCIe block contains an MDIO interface. This is a local interface
> >> >> only accessible by the PCIe controller. It cannot be used or shared
> >> >> by any other HW. As such, the small amount of code for this
> >> >> controller is included in this driver as there is little upside to put
> >> >> it elsewhere.
> >> ...
> >
> >> >> +static bool brcm_pcie_valid_device(struct brcm_pcie *pcie, struct pci_bus *bus,
> >> >> + int dev)
> >> >> +{
> >> >> + if (pci_is_root_bus(bus)) {
> >> >> + if (dev > 0)
> >> >> + return false;
> >> >> + } else {
> >> >> + /* If there is no link, then there is no device */
> >> >> + if (!brcm_pcie_link_up(pcie))
> >> >> + return false;
> >> >
> >> > This is racy, since the link can go down after you check but before
> >> > you do the config access. I assume your hardware can deal with a
> >> > config access that targets a link that is down?
> >>
> >> Yes, that can happen but there is really nothing that can be done if
> >> the link goes down in that vulnerability window. What do you suggest
> >> doing?
> >
> > Most hardware drops writes and returns ~0 on reads if the link is
> > down. I assume your hardware does something similar, and that should
> > be enough. You shouldn't have to check whether the link is up.
> Unfortunately our HW is quite unforgiving and effects a synchronous or
> asynchronous abort when doing a config access when the link or power
> has gone down on the EP. I will open a discussion with the PCIe HW
> folks regarding why our controller does not behave like "most
> hardware". Thanks, Jim
I mentioned in the other thread [1] that I think the best way to
handle this is to figure out how to deal with the abort cleanly.
Using a test like *_pcie_link_up() to try to avoid it is a 99%
solution that means we'll see rare failures that are very difficult to
reproduce and debug.
> > The hardware might report errors, e.g., via AER, if the link is down.
> > And we might not not handle those nicely. If we have issues there, we
> > should find out and fix them.
[1] https://lkml.kernel.org/r/20171214225821.GN30595@bhelgaas-glaptop.roam.corp.google.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2017-12-15 20:14 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-11-14 22:12 [PATCH v3 0/8] PCI: brcmstb: Add Broadcom Settopbox PCIe support (V3) Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 1/8] SOC: brcmstb: add memory API Jim Quinlan
2017-12-05 20:59 ` Bjorn Helgaas
2017-12-08 23:28 ` Florian Fainelli
2017-12-12 20:53 ` Jim Quinlan
2017-12-12 21:14 ` Bjorn Helgaas
2017-12-15 17:14 ` Lorenzo Pieralisi
2017-12-15 19:50 ` Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 2/8] dt-bindings: pci: Add DT docs for Brcmstb PCIe device Jim Quinlan
2017-11-16 5:07 ` Rob Herring
2017-11-14 22:12 ` [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver Jim Quinlan
2017-12-12 22:16 ` Bjorn Helgaas
2017-12-13 23:53 ` Jim Quinlan
2017-12-14 22:51 ` Bjorn Helgaas
2017-12-15 19:53 ` Jim Quinlan
2017-12-15 20:14 ` Bjorn Helgaas [this message]
2017-12-14 20:30 ` Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic Jim Quinlan
2017-12-12 22:32 ` Bjorn Helgaas
2017-11-14 22:12 ` [PATCH v3 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 6/8] PCI: brcmstb: Add MSI capability Jim Quinlan
2017-12-12 22:43 ` Bjorn Helgaas
2017-11-14 22:12 ` [PATCH v3 7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435 Jim Quinlan
2017-11-14 22:12 ` [PATCH v3 8/8] MIPS: BMIPS: Enable PCI Jim Quinlan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171215201434.GY30595@bhelgaas-glaptop.roam.corp.google.com \
--to=helgaas@kernel.org \
--cc=bcm-kernel-feedback-list@broadcom.com \
--cc=bhelgaas@google.com \
--cc=catalin.marinas@arm.com \
--cc=cernekee@gmail.com \
--cc=computersforpeace@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=f.fainelli@gmail.com \
--cc=gregory.0xf0@gmail.com \
--cc=hch@lst.de \
--cc=jim2101024@gmail.com \
--cc=jonas.gorski@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=linux-pci@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=ralf@linux-mips.org \
--cc=rmk+kernel@armlinux.org.uk \
--cc=robh+dt@kernel.org \
--cc=robin.murphy@arm.com \
--cc=will.deacon@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).