From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 765C3C43441 for ; Tue, 13 Nov 2018 22:57:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 3500F223C8 for ; Tue, 13 Nov 2018 22:57:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3500F223C8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-pci-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728210AbeKNI6J (ORCPT ); Wed, 14 Nov 2018 03:58:09 -0500 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:35836 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726408AbeKNI6I (ORCPT ); Wed, 14 Nov 2018 03:58:08 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A0AC380D; Tue, 13 Nov 2018 14:57:46 -0800 (PST) Received: from localhost.localdomain (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 43FF03F718; Tue, 13 Nov 2018 14:57:46 -0800 (PST) From: Marc Zyngier To: linux-pci@vger.kernel.org, Lorenzo Pieralisi , Bjorn Helgaas Cc: Trent Piepho , Jingoo Han , Gustavo Pimentel , faiz_abbas@ti.com, Joao Pinto , Vignesh R Subject: [PATCH 0/3] PCI: designware: Fixing MSI handling flow Date: Tue, 13 Nov 2018 22:57:31 +0000 Message-Id: <20181113225734.8026-1-marc.zyngier@arm.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org It recently came to light that the Designware PCIe driver is rather broken in the way it handles MSI[1]: - It masks interrupt by disabling them, meaning that MSIs generated during the masked window are simply lost. Oops. - Acking of the currently pending MSI is done outside of the interrupt flow, getting moved around randomly and ultimately breaking the driver. Not great. This series attempts to address this by switching to using the MASK register for masking interrupts (!), and move the ack into the appropriate callback, giving it a fixed place in the MSI handling flow. Note that this is only compile-tested on my arm64 laptop, as I'm travelling and do not have the required HW to test it anyway. I'd welcome both review and testing by the interested parties (dwc maintainer and users affected by existing bugs). Thanks, M. [1] https://patchwork.kernel.org/patch/10657987/ Marc Zyngier (3): PCI: designware: Use interrupt masking instead of disabling PCI: designware: Take lock when ACKing an interrupt PCI: designware: Move interrupt acking into the proper callback .../pci/controller/dwc/pcie-designware-host.c | 22 ++++++++++++------- 1 file changed, 14 insertions(+), 8 deletions(-) -- 2.19.1