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From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
To: <linux-pci@vger.kernel.org>
Cc: <linuxarm@huawei.com>, Bjorn Helgaas <bhelgaas@google.com>,
	<linux-arm-kernel@lists.infradead.org>,
	Will Deacon <will.deacon@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Mika Westerberg <mika.westerberg@linux.intel.com>,
	Keith Busch <keith.busch@intel.com>,
	"Zhou Wang" <wangzhou1@hisilicon.com>,
	Shaokun Zhang <zhangshaokun@hisilicon.com>,
	Jonathan Cameron <Jonathan.Cameron@huawei.com>
Subject: [RFC PATCH 0/2] Support HiSilicon PCIe Transport Layer PMU
Date: Fri, 14 Dec 2018 21:10:53 +0800	[thread overview]
Message-ID: <20181214131055.52253-1-Jonathan.Cameron@huawei.com> (raw)

Add a perf PMU driver to expose the hardware events for a HiSilicon
PCIe root port.

There are several reasons this is an RFC:

1. The binding to the PCIe port
2. There aren't any existing PCI Performance Monitoring Units (PMU),
   drivers that I can find, so new ground to break.

Taking these in turn.

Binding to the PCIe port
------------------------

The original PCIe port driver had a concept of vendor defined sub drivers but
that has been removed due to lack of users (it was still in the documentation
last time I checked).  This 'could' be used to support PMUs, and seems to
be a relatively elegant approach, representing that these are fundamentally
part of the PCIe port.

There are several ways the hardware interface for a PMU for a PCIe port
could have been implemented.
1) In PCIe config space (DVSEC) of root port.
2) As a 'platform device' on the host that has some known associate with
   the port.  This is the case we have here.

Note the current interface is a hack to illustrate the point.

The alternative is just to have this as an uncore PMU and perhaps use naming
to identify that it is associated with the PCIe port.  To my mind this is
an ugly solution and doesn't work if hardware using config space (option 1)
come along shortly.

It is worth noting that we can only make the association here because
the ACPI provide the resources to the PCIe device in DSDT.

A related question is where the driver should actualy go?

PCI Performance Monitoring Units
--------------------------------
There is no standard for performance monitoring of PCI transport layer
(or any other for that matter).  However, a lot of things being counted
are likely to be fairly consistent across different implementations.

To that end, it would be good to define naming of the events to be 'standard'
if possible!


Jonathan Cameron (2):
  pci/portdrv: Allow for vendor defined performance monitoring units.
  PCI/portdrv Hisilicon PCIe transport layer Port PMU driver.

 drivers/pci/pcie/Kconfig         |   9 +
 drivers/pci/pcie/Makefile        |   2 +
 drivers/pci/pcie/hisi_pcie_pmu.c | 528 +++++++++++++++++++++++++++++++
 drivers/pci/pcie/portdrv.h       |   4 +-
 drivers/pci/pcie/portdrv_core.c  |   2 +
 include/linux/cpuhotplug.h       |   1 +
 6 files changed, 545 insertions(+), 1 deletion(-)
 create mode 100644 drivers/pci/pcie/hisi_pcie_pmu.c

-- 
2.19.1


             reply	other threads:[~2018-12-14 13:11 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-14 13:10 Jonathan Cameron [this message]
2018-12-14 13:10 ` [RFC PATCH 1/2] pci/portdrv: Allow for vendor defined performance monitoring units Jonathan Cameron
2018-12-14 13:10 ` [RFC PATCH 2/2] PCI/portdrv Hisilicon PCIe transport layer Port PMU driver Jonathan Cameron
2018-12-14 23:55   ` Bjorn Helgaas
2018-12-17 11:09     ` Jonathan Cameron
2018-12-17 18:19       ` Bjorn Helgaas
2018-12-17 18:34         ` Logan Gunthorpe
2018-12-18 10:21         ` Jonathan Cameron
2019-01-03 15:44           ` Will Deacon

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