From: Andrey Smirnov <andrew.smirnov@gmail.com>
To: linux-pci@vger.kernel.org
Cc: Andrey Smirnov <andrew.smirnov@gmail.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
Fabio Estevam <fabio.estevam@nxp.com>,
Chris Healy <cphealy@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>,
Leonard Crestez <leonard.crestez@nxp.com>,
"A.s. Dong" <aisheng.dong@nxp.com>,
Richard Zhu <hongxing.zhu@nxp.com>,
linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH 18/21] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll()
Date: Thu, 20 Dec 2018 23:27:13 -0800 [thread overview]
Message-ID: <20181221072716.29017-19-andrew.smirnov@gmail.com> (raw)
In-Reply-To: <20181221072716.29017-1-andrew.smirnov@gmail.com>
Simplify bit operations in imx6_setup_phy_mpll() by using
GENMASK/FIELD_PREP. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 38c8e8baa077..678f5fa85e12 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -96,12 +96,10 @@ struct imx6_pcie {
/* PHY registers (not memory-mapped) */
#define PCIE_PHY_ATEOVRD 0x10
#define PCIE_PHY_ATEOVRD_EN BIT(2)
-#define PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT 0
-#define PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK 0x1
+#define PCIE_PHY_ATEOVRD_REF_CLKDIV BIT(0)
#define PCIE_PHY_MPLL_OVRD_IN_LO 0x11
-#define PCIE_PHY_MPLL_MULTIPLIER_SHIFT 2
-#define PCIE_PHY_MPLL_MULTIPLIER_MASK 0x7f
+#define PCIE_PHY_MPLL_MULTIPLIER GENMASK(8, 2)
#define PCIE_PHY_MPLL_MULTIPLIER_OVRD BIT(9)
#define PHY_RX_OVRD_IN_LO 0x1005
@@ -565,16 +563,14 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
}
pcie_phy_read(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, &val);
- val &= ~(PCIE_PHY_MPLL_MULTIPLIER_MASK <<
- PCIE_PHY_MPLL_MULTIPLIER_SHIFT);
- val |= mult << PCIE_PHY_MPLL_MULTIPLIER_SHIFT;
+ val &= ~PCIE_PHY_MPLL_MULTIPLIER;
+ val |= FIELD_PREP(PCIE_PHY_MPLL_MULTIPLIER, mult);
val |= PCIE_PHY_MPLL_MULTIPLIER_OVRD;
pcie_phy_write(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, val);
pcie_phy_read(imx6_pcie, PCIE_PHY_ATEOVRD, &val);
- val &= ~(PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK <<
- PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT);
- val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT;
+ val &= ~PCIE_PHY_ATEOVRD_REF_CLKDIV;
+ val |= FIELD_PREP(PCIE_PHY_ATEOVRD_REF_CLKDIV, div);
val |= PCIE_PHY_ATEOVRD_EN;
pcie_phy_write(imx6_pcie, PCIE_PHY_ATEOVRD, val);
--
2.19.1
next prev parent reply other threads:[~2018-12-21 7:28 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-21 7:26 [PATCH 00/21] i.MX6, DesignWare PCI improvements Andrey Smirnov
2018-12-21 7:26 ` [PATCH 01/21] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2018-12-21 7:26 ` [PATCH 02/21] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
2018-12-21 7:26 ` [PATCH 03/21] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
2018-12-21 7:26 ` [PATCH 04/21] PCI: imx6: Remove duplicate macro definitions Andrey Smirnov
2018-12-21 7:27 ` [PATCH 05/21] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
2018-12-21 7:27 ` [PATCH 06/21] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants Andrey Smirnov
2018-12-21 7:27 ` [PATCH 07/21] PCI: designware: Make use of IS_ALIGNED() Andrey Smirnov
2019-01-02 9:33 ` Gustavo Pimentel
2019-01-04 18:37 ` Joe Perches
2019-01-04 18:52 ` Andrey Smirnov
2018-12-21 7:27 ` [PATCH 08/21] PCI: designware: Share code for dw_pcie_rd/wr_other_conf() Andrey Smirnov
2019-01-02 10:21 ` Gustavo Pimentel
2018-12-21 7:27 ` [PATCH 09/21] PCI: imx6: Drop imx6_pcie_link_up() Andrey Smirnov
2018-12-21 18:55 ` Trent Piepho
2018-12-22 0:39 ` Andrey Smirnov
2018-12-21 7:27 ` [PATCH 10/21] PCI: designware: imx6: Share PHY debug register definitions Andrey Smirnov
2018-12-21 7:27 ` [PATCH 11/21] PCI: designware: Make use of BIT() in constant definitions Andrey Smirnov
2018-12-26 15:14 ` Gustavo Pimentel
2019-01-02 18:28 ` Andrey Smirnov
2019-01-02 18:31 ` Gustavo Pimentel
2018-12-21 7:27 ` [PATCH 12/21] PCI: imx6: " Andrey Smirnov
2018-12-21 7:27 ` [PATCH 13/21] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
2018-12-21 7:27 ` [PATCH 14/21] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
2018-12-21 7:27 ` [PATCH 15/21] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
2018-12-21 7:27 ` [PATCH 16/21] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly Andrey Smirnov
2018-12-21 7:27 ` [PATCH 17/21] PCI: imx6: Use common mask in imx6_pcie_reset_phy() Andrey Smirnov
2018-12-21 7:27 ` Andrey Smirnov [this message]
2018-12-21 7:27 ` [PATCH 19/21] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link() Andrey Smirnov
2018-12-21 7:27 ` [PATCH 20/21] PCI: designware: Make use of GENMASK/FIELD_PREP Andrey Smirnov
2018-12-26 15:07 ` Gustavo Pimentel
2018-12-21 7:27 ` [PATCH 21/21] PCI: designware: Remove superfluous shifting in definitions Andrey Smirnov
2018-12-26 14:49 ` Gustavo Pimentel
2018-12-26 15:26 ` [PATCH 00/21] i.MX6, DesignWare PCI improvements Gustavo Pimentel
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