* [PATCH v2 01/20] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 02/20] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
` (19 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Make use of regmap_read_poll_timeout() to simplify
imx7d_pcie_wait_for_phy_pll_lock(). No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 21 +++++++--------------
1 file changed, 7 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 4380ee797c04..c73c7a6a4c55 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -86,9 +86,8 @@ struct imx6_pcie {
};
/* Parameters for the waiting for PCIe PHY PLL to lock on i.MX7 */
-#define PHY_PLL_LOCK_WAIT_MAX_RETRIES 2000
-#define PHY_PLL_LOCK_WAIT_USLEEP_MIN 50
#define PHY_PLL_LOCK_WAIT_USLEEP_MAX 200
+#define PHY_PLL_LOCK_WAIT_TIMEOUT (2000 * PHY_PLL_LOCK_WAIT_USLEEP_MAX)
/* PCIe Root Complex registers (memory-mapped) */
#define PCIE_RC_LCR 0x7c
@@ -459,20 +458,14 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
static void imx7d_pcie_wait_for_phy_pll_lock(struct imx6_pcie *imx6_pcie)
{
u32 val;
- unsigned int retries;
struct device *dev = imx6_pcie->pci->dev;
- for (retries = 0; retries < PHY_PLL_LOCK_WAIT_MAX_RETRIES; retries++) {
- regmap_read(imx6_pcie->iomuxc_gpr, IOMUXC_GPR22, &val);
-
- if (val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED)
- return;
-
- usleep_range(PHY_PLL_LOCK_WAIT_USLEEP_MIN,
- PHY_PLL_LOCK_WAIT_USLEEP_MAX);
- }
-
- dev_err(dev, "PCIe PLL lock timeout\n");
+ if (regmap_read_poll_timeout(imx6_pcie->iomuxc_gpr,
+ IOMUXC_GPR22, val,
+ val & IMX7D_GPR22_PCIE_PHY_PLL_LOCKED,
+ PHY_PLL_LOCK_WAIT_USLEEP_MAX,
+ PHY_PLL_LOCK_WAIT_TIMEOUT))
+ dev_err(dev, "PCIe PLL lock timeout\n");
}
static void imx6_pcie_deassert_core_reset(struct imx6_pcie *imx6_pcie)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 02/20] PCI: imx6: Remove redundant debug tracing
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 01/20] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 03/20] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
` (18 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
All calls to imx6_pcie_wait_for_link() share the same error path and
the state of PHY debug registers will already be printed there.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index c73c7a6a4c55..491a93a02c80 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -677,16 +677,9 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
static int imx6_pcie_wait_for_link(struct imx6_pcie *imx6_pcie)
{
struct dw_pcie *pci = imx6_pcie->pci;
- struct device *dev = pci->dev;
/* check if the link is up or not */
- if (!dw_pcie_wait_for_link(pci))
- return 0;
-
- dev_dbg(dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n",
- dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0),
- dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1));
- return -ETIMEDOUT;
+ return dw_pcie_wait_for_link(pci);
}
static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 03/20] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 01/20] PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock() Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 02/20] PCI: imx6: Remove redundant debug tracing Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 04/20] PCI: imx6: Remove duplicate macro definitions Andrey Smirnov
` (17 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Change error code from EINVAL to ETIMEDOUT in
imx6_pcie_wait_for_speed_change() since that error code seems more
appropriate.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 491a93a02c80..a81edfac9974 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -698,7 +698,7 @@ static int imx6_pcie_wait_for_speed_change(struct imx6_pcie *imx6_pcie)
}
dev_err(dev, "Speed change timeout\n");
- return -EINVAL;
+ return -ETIMEDOUT;
}
static void imx6_pcie_ltssm_enable(struct device *dev)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 04/20] PCI: imx6: Remove duplicate macro definitions
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (2 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 03/20] PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 05/20] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
` (16 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Both PCIE_LINK_WIDTH_SPEED_CONTROL and PORT_LOGIC_SPEED_CHANGE are
already defined in pcie-desingware.h, so drop duplicate definintion in
pci-imx6.c. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index a81edfac9974..5090a618c3e2 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -115,9 +115,6 @@ struct imx6_pcie {
#define PCIE_PHY_STAT (PL_OFFSET + 0x110)
#define PCIE_PHY_STAT_ACK_LOC 16
-#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
-#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
-
/* PHY registers (not memory-mapped) */
#define PCIE_PHY_ATEOVRD 0x10
#define PCIE_PHY_ATEOVRD_EN (0x1 << 2)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 05/20] PCI: imx6: Remove PCIE_PL_PFLR_* constants
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (3 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 04/20] PCI: imx6: Remove duplicate macro definitions Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 06/20] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants Andrey Smirnov
` (15 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Code using these constants was removed in commit a71280722eeb ("PCI:
imx6: Remove LTSSM disable workaround"). No functional change
intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 5090a618c3e2..a7192b9e0e71 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -99,9 +99,6 @@ struct imx6_pcie {
/* PCIe Port Logic registers (memory-mapped) */
#define PL_OFFSET 0x700
-#define PCIE_PL_PFLR (PL_OFFSET + 0x08)
-#define PCIE_PL_PFLR_LINK_STATE_MASK (0x3f << 16)
-#define PCIE_PL_PFLR_FORCE_LINK (1 << 15)
#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 06/20] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (4 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 05/20] PCI: imx6: Remove PCIE_PL_PFLR_* constants Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 07/20] PCI: dwc: Make use of IS_ALIGNED() Andrey Smirnov
` (14 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Code using these constants was removed in commit a77c5422d758 ("PCI:
imx6: Remove broken Gen2 workaround"). No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index a7192b9e0e71..282b09076fea 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -123,9 +123,6 @@ struct imx6_pcie {
#define PCIE_PHY_MPLL_MULTIPLIER_MASK 0x7f
#define PCIE_PHY_MPLL_MULTIPLIER_OVRD (0x1 << 9)
-#define PCIE_PHY_RX_ASIC_OUT 0x100D
-#define PCIE_PHY_RX_ASIC_OUT_VALID (1 << 0)
-
#define PHY_RX_OVRD_IN_LO 0x1005
#define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5)
#define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 07/20] PCI: dwc: Make use of IS_ALIGNED()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (5 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 06/20] PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 08/20] PCI: dwc: Share code for dw_pcie_rd/wr_other_conf() Andrey Smirnov
` (13 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel,
Gustavo Pimentel
Make the intent a bit more clear as well as get rid of explicit
arithmetic by using IS_ALIGNED() to determine if "addr" is aligned to
"size". No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 93ef8c31fb39..67236379c61a 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -22,7 +22,7 @@
int dw_pcie_read(void __iomem *addr, int size, u32 *val)
{
- if ((uintptr_t)addr & (size - 1)) {
+ if (!IS_ALIGNED((uintptr_t)addr, size)) {
*val = 0;
return PCIBIOS_BAD_REGISTER_NUMBER;
}
@@ -43,7 +43,7 @@ int dw_pcie_read(void __iomem *addr, int size, u32 *val)
int dw_pcie_write(void __iomem *addr, int size, u32 val)
{
- if ((uintptr_t)addr & (size - 1))
+ if (!IS_ALIGNED((uintptr_t)addr, size))
return PCIBIOS_BAD_REGISTER_NUMBER;
if (size == 4)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 08/20] PCI: dwc: Share code for dw_pcie_rd/wr_other_conf()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (6 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 07/20] PCI: dwc: Make use of IS_ALIGNED() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 09/20] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
` (12 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel,
Gustavo Pimentel
Default implementation of pcie_rd_other_conf() and
dw_pcie_wd_other_conf() share more than 80% of their code. Move shared
code into a dedicated subroutine and convert pcie_rd_other_conf() and
dw_pcie_wd_other_conf() to use it. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
.../pci/controller/dwc/pcie-designware-host.c | 61 +++++++------------
1 file changed, 23 insertions(+), 38 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index 721d60a5d9e4..8f957cd6901b 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -512,8 +512,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
return ret;
}
-static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
- u32 devfn, int where, int size, u32 *val)
+static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 *val,
+ bool write)
{
int ret, type;
u32 busdev, cfg_size;
@@ -521,9 +522,6 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
void __iomem *va_cfg_base;
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
- if (pp->ops->rd_other_conf)
- return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val);
-
busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |
PCIE_ATU_FUNC(PCI_FUNC(devfn));
@@ -542,7 +540,11 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,
type, cpu_addr,
busdev, cfg_size);
- ret = dw_pcie_read(va_cfg_base + where, size, val);
+ if (write)
+ ret = dw_pcie_write(va_cfg_base + where, size, *val);
+ else
+ ret = dw_pcie_read(va_cfg_base + where, size, val);
+
if (pci->num_viewport <= 2)
dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,
PCIE_ATU_TYPE_IO, pp->io_base,
@@ -551,43 +553,26 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
return ret;
}
+static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus,
+ u32 devfn, int where, int size, u32 *val)
+{
+ if (pp->ops->rd_other_conf)
+ return pp->ops->rd_other_conf(pp, bus, devfn, where,
+ size, val);
+
+ return dw_pcie_access_other_conf(pp, bus, devfn, where, size, val,
+ false);
+}
+
static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus,
u32 devfn, int where, int size, u32 val)
{
- int ret, type;
- u32 busdev, cfg_size;
- u64 cpu_addr;
- void __iomem *va_cfg_base;
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-
if (pp->ops->wr_other_conf)
- return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val);
-
- busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) |
- PCIE_ATU_FUNC(PCI_FUNC(devfn));
+ return pp->ops->wr_other_conf(pp, bus, devfn, where,
+ size, val);
- if (bus->parent->number == pp->root_bus_nr) {
- type = PCIE_ATU_TYPE_CFG0;
- cpu_addr = pp->cfg0_base;
- cfg_size = pp->cfg0_size;
- va_cfg_base = pp->va_cfg0_base;
- } else {
- type = PCIE_ATU_TYPE_CFG1;
- cpu_addr = pp->cfg1_base;
- cfg_size = pp->cfg1_size;
- va_cfg_base = pp->va_cfg1_base;
- }
-
- dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,
- type, cpu_addr,
- busdev, cfg_size);
- ret = dw_pcie_write(va_cfg_base + where, size, val);
- if (pci->num_viewport <= 2)
- dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1,
- PCIE_ATU_TYPE_IO, pp->io_base,
- pp->io_bus_addr, pp->io_size);
-
- return ret;
+ return dw_pcie_access_other_conf(pp, bus, devfn, where, size, &val,
+ true);
}
static int dw_pcie_valid_device(struct pcie_port *pp, struct pci_bus *bus,
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 09/20] PCI: dwc: imx6: Share PHY debug register definitions
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (7 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 08/20] PCI: dwc: Share code for dw_pcie_rd/wr_other_conf() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 10/20] PCI: dwc: Make use of BIT() in constant definitions Andrey Smirnov
` (11 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Both pcie-designware.c and pci-imx6.c contain custom definitions for
PHY debug registers R0/R1 and on top of that there's already a
definition for R0 in pcie-designware.h. Move all of the definitions to
pcie-designware.h. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 6 ++----
drivers/pci/controller/dwc/pcie-designware.c | 12 +++---------
drivers/pci/controller/dwc/pcie-designware.h | 3 +++
3 files changed, 8 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 282b09076fea..5e7fab089bde 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -99,8 +99,6 @@ struct imx6_pcie {
/* PCIe Port Logic registers (memory-mapped) */
#define PL_OFFSET 0x700
-#define PCIE_PHY_DEBUG_R0 (PL_OFFSET + 0x28)
-#define PCIE_PHY_DEBUG_R1 (PL_OFFSET + 0x2c)
#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
#define PCIE_PHY_CTRL_DATA_LOC 0
@@ -784,8 +782,8 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
err_reset_phy:
dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
- dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R0),
- dw_pcie_readl_dbi(pci, PCIE_PHY_DEBUG_R1));
+ dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
+ dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
imx6_pcie_reset_phy(imx6_pcie);
return ret;
}
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index 67236379c61a..d123ac290b9e 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -14,12 +14,6 @@
#include "pcie-designware.h"
-/* PCIe Port Logic registers */
-#define PLR_OFFSET 0x700
-#define PCIE_PHY_DEBUG_R1 (PLR_OFFSET + 0x2c)
-#define PCIE_PHY_DEBUG_R1_LINK_UP (0x1 << 4)
-#define PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING (0x1 << 29)
-
int dw_pcie_read(void __iomem *addr, int size, u32 *val)
{
if (!IS_ALIGNED((uintptr_t)addr, size)) {
@@ -334,9 +328,9 @@ int dw_pcie_link_up(struct dw_pcie *pci)
if (pci->ops->link_up)
return pci->ops->link_up(pci);
- val = readl(pci->dbi_base + PCIE_PHY_DEBUG_R1);
- return ((val & PCIE_PHY_DEBUG_R1_LINK_UP) &&
- (!(val & PCIE_PHY_DEBUG_R1_LINK_IN_TRAINING)));
+ val = readl(pci->dbi_base + PCIE_PORT_DEBUG1);
+ return ((val & PCIE_PORT_DEBUG1_LINK_UP) &&
+ (!(val & PCIE_PORT_DEBUG1_LINK_IN_TRAINING)));
}
void dw_pcie_setup(struct dw_pcie *pci)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 9943d8c68335..58735fd01668 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -39,6 +39,9 @@
#define PCIE_PORT_DEBUG0 0x728
#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f
#define PORT_LOGIC_LTSSM_STATE_L0 0x11
+#define PCIE_PORT_DEBUG1 0x72C
+#define PCIE_PORT_DEBUG1_LINK_UP (0x1 << 4)
+#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING (0x1 << 29)
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 10/20] PCI: dwc: Make use of BIT() in constant definitions
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (8 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 09/20] PCI: dwc: imx6: Share PHY debug register definitions Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 11/20] PCI: imx6: " Andrey Smirnov
` (10 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel,
Gustavo Pimentel
Avoid using explicit left shifts and convert various definitions to
use BIT() instead. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 2 +-
drivers/pci/controller/dwc/pcie-designware.h | 18 +++++++++---------
2 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index d123ac290b9e..086e87a40316 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -300,7 +300,7 @@ void dw_pcie_disable_atu(struct dw_pcie *pci, int index,
}
dw_pcie_writel_dbi(pci, PCIE_ATU_VIEWPORT, region | index);
- dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, ~PCIE_ATU_ENABLE);
+ dw_pcie_writel_dbi(pci, PCIE_ATU_CR2, (u32)~PCIE_ATU_ENABLE);
}
int dw_pcie_wait_for_link(struct dw_pcie *pci)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 58735fd01668..348e91b6daa2 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -40,11 +40,11 @@
#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f
#define PORT_LOGIC_LTSSM_STATE_L0 0x11
#define PCIE_PORT_DEBUG1 0x72C
-#define PCIE_PORT_DEBUG1_LINK_UP (0x1 << 4)
-#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING (0x1 << 29)
+#define PCIE_PORT_DEBUG1_LINK_UP BIT(4)
+#define PCIE_PORT_DEBUG1_LINK_IN_TRAINING BIT(29)
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
-#define PORT_LOGIC_SPEED_CHANGE (0x1 << 17)
+#define PORT_LOGIC_SPEED_CHANGE BIT(17)
#define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8)
#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8)
#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8)
@@ -58,8 +58,8 @@
#define PCIE_MSI_INTR0_STATUS 0x830
#define PCIE_ATU_VIEWPORT 0x900
-#define PCIE_ATU_REGION_INBOUND (0x1 << 31)
-#define PCIE_ATU_REGION_OUTBOUND (0x0 << 31)
+#define PCIE_ATU_REGION_INBOUND BIT(31)
+#define PCIE_ATU_REGION_OUTBOUND 0
#define PCIE_ATU_REGION_INDEX2 (0x2 << 0)
#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
@@ -69,8 +69,8 @@
#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
#define PCIE_ATU_CR2 0x908
-#define PCIE_ATU_ENABLE (0x1 << 31)
-#define PCIE_ATU_BAR_MODE_ENABLE (0x1 << 30)
+#define PCIE_ATU_ENABLE BIT(31)
+#define PCIE_ATU_BAR_MODE_ENABLE BIT(30)
#define PCIE_ATU_LOWER_BASE 0x90C
#define PCIE_ATU_UPPER_BASE 0x910
#define PCIE_ATU_LIMIT 0x914
@@ -81,7 +81,7 @@
#define PCIE_ATU_UPPER_TARGET 0x91C
#define PCIE_MISC_CONTROL_1_OFF 0x8BC
-#define PCIE_DBI_RO_WR_EN (0x1 << 0)
+#define PCIE_DBI_RO_WR_EN BIT(0)
/*
* iATU Unroll-specific register definitions
@@ -108,7 +108,7 @@
((region) << 9)
#define PCIE_GET_ATU_INB_UNR_REG_OFFSET(region) \
- (((region) << 9) | (0x1 << 8))
+ (((region) << 9) | BIT(8))
#define MAX_MSI_IRQS 256
#define MAX_MSI_IRQS_PER_CTRL 32
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 11/20] PCI: imx6: Make use of BIT() in constant definitions
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (9 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 10/20] PCI: dwc: Make use of BIT() in constant definitions Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 12/20] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
` (9 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Avoid using explicit left shifts and convert various definitions to
use BIT() instead. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 5e7fab089bde..180ba57da4e8 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -112,18 +112,18 @@ struct imx6_pcie {
/* PHY registers (not memory-mapped) */
#define PCIE_PHY_ATEOVRD 0x10
-#define PCIE_PHY_ATEOVRD_EN (0x1 << 2)
+#define PCIE_PHY_ATEOVRD_EN BIT(2)
#define PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT 0
#define PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK 0x1
#define PCIE_PHY_MPLL_OVRD_IN_LO 0x11
#define PCIE_PHY_MPLL_MULTIPLIER_SHIFT 2
#define PCIE_PHY_MPLL_MULTIPLIER_MASK 0x7f
-#define PCIE_PHY_MPLL_MULTIPLIER_OVRD (0x1 << 9)
+#define PCIE_PHY_MPLL_MULTIPLIER_OVRD BIT(9)
#define PHY_RX_OVRD_IN_LO 0x1005
-#define PHY_RX_OVRD_IN_LO_RX_DATA_EN (1 << 5)
-#define PHY_RX_OVRD_IN_LO_RX_PLL_EN (1 << 3)
+#define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5)
+#define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3)
static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
{
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 12/20] PCI: imx6: Simplify bit operations in PHY functions
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (10 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 11/20] PCI: imx6: " Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 13/20] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
` (8 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Simplify the code by incorporating left shifts into constant
defnitions as well as using FIELD_PREP/GENMASK. No functional change
intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 28 +++++++++++++--------------
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 180ba57da4e8..672332483324 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -101,11 +101,11 @@ struct imx6_pcie {
#define PL_OFFSET 0x700
#define PCIE_PHY_CTRL (PL_OFFSET + 0x114)
-#define PCIE_PHY_CTRL_DATA_LOC 0
-#define PCIE_PHY_CTRL_CAP_ADR_LOC 16
-#define PCIE_PHY_CTRL_CAP_DAT_LOC 17
-#define PCIE_PHY_CTRL_WR_LOC 18
-#define PCIE_PHY_CTRL_RD_LOC 19
+#define PCIE_PHY_CTRL_DATA(x) FIELD_PREP(GENMASK(15, 0), (x))
+#define PCIE_PHY_CTRL_CAP_ADR BIT(16)
+#define PCIE_PHY_CTRL_CAP_DAT BIT(17)
+#define PCIE_PHY_CTRL_WR BIT(18)
+#define PCIE_PHY_CTRL_RD BIT(19)
#define PCIE_PHY_STAT (PL_OFFSET + 0x110)
#define PCIE_PHY_STAT_ACK_LOC 16
@@ -152,17 +152,17 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
u32 val;
int ret;
- val = addr << PCIE_PHY_CTRL_DATA_LOC;
+ val = PCIE_PHY_CTRL_DATA(addr);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
- val |= (0x1 << PCIE_PHY_CTRL_CAP_ADR_LOC);
+ val |= PCIE_PHY_CTRL_CAP_ADR;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
if (ret)
return ret;
- val = addr << PCIE_PHY_CTRL_DATA_LOC;
+ val = PCIE_PHY_CTRL_DATA(addr);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, val);
return pcie_phy_poll_ack(imx6_pcie, 0);
@@ -180,7 +180,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
return ret;
/* assert Read signal */
- phy_ctl = 0x1 << PCIE_PHY_CTRL_RD_LOC;
+ phy_ctl = PCIE_PHY_CTRL_RD;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -208,11 +208,11 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
if (ret)
return ret;
- var = data << PCIE_PHY_CTRL_DATA_LOC;
+ var = PCIE_PHY_CTRL_DATA(data);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* capture data */
- var |= (0x1 << PCIE_PHY_CTRL_CAP_DAT_LOC);
+ var |= PCIE_PHY_CTRL_CAP_DAT;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -220,7 +220,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
return ret;
/* deassert cap data */
- var = data << PCIE_PHY_CTRL_DATA_LOC;
+ var = PCIE_PHY_CTRL_DATA(data);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* wait for ack de-assertion */
@@ -229,7 +229,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
return ret;
/* assert wr signal */
- var = 0x1 << PCIE_PHY_CTRL_WR_LOC;
+ var = PCIE_PHY_CTRL_WR;
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* wait for ack */
@@ -238,7 +238,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
return ret;
/* deassert wr signal */
- var = data << PCIE_PHY_CTRL_DATA_LOC;
+ var = PCIE_PHY_CTRL_DATA(data);
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
/* wait for ack de-assertion */
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 13/20] PCI: imx6: Simplify pcie_phy_poll_ack()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (11 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 12/20] PCI: imx6: Simplify bit operations in PHY functions Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 14/20] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
` (7 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Simplify pcie_phy_poll_ack() by incorporating shifting into constant
definition and convert the code to use 'bool'. No functional change
intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 672332483324..2a7075a9cba6 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -108,7 +108,7 @@ struct imx6_pcie {
#define PCIE_PHY_CTRL_RD BIT(19)
#define PCIE_PHY_STAT (PL_OFFSET + 0x110)
-#define PCIE_PHY_STAT_ACK_LOC 16
+#define PCIE_PHY_STAT_ACK BIT(16)
/* PHY registers (not memory-mapped) */
#define PCIE_PHY_ATEOVRD 0x10
@@ -125,16 +125,16 @@ struct imx6_pcie {
#define PHY_RX_OVRD_IN_LO_RX_DATA_EN BIT(5)
#define PHY_RX_OVRD_IN_LO_RX_PLL_EN BIT(3)
-static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, int exp_val)
+static int pcie_phy_poll_ack(struct imx6_pcie *imx6_pcie, bool exp_val)
{
struct dw_pcie *pci = imx6_pcie->pci;
- u32 val;
+ bool val;
u32 max_iterations = 10;
u32 wait_counter = 0;
do {
- val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
- val = (val >> PCIE_PHY_STAT_ACK_LOC) & 0x1;
+ val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT) &
+ PCIE_PHY_STAT_ACK;
wait_counter++;
if (val == exp_val)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 14/20] PCI: imx6: Restrict PHY register data to 16-bit
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (12 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 13/20] PCI: imx6: Simplify pcie_phy_poll_ack() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 15/20] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly Andrey Smirnov
` (6 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
PHY registers on i.MX6 are 16-bit wide, so we can get rid of explicit
masking if we restrict pcie_phy_read/pcie_phy_write to use 'u16'
instead of 'int'. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 2a7075a9cba6..02342b1762fa 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -169,10 +169,10 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
}
/* Read from the 16-bit PCIe PHY control registers (not memory-mapped) */
-static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
+static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
{
struct dw_pcie *pci = imx6_pcie->pci;
- u32 val, phy_ctl;
+ u32 phy_ctl;
int ret;
ret = pcie_phy_wait_ack(imx6_pcie, addr);
@@ -187,8 +187,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
if (ret)
return ret;
- val = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
- *data = val & 0xffff;
+ *data = dw_pcie_readl_dbi(pci, PCIE_PHY_STAT);
/* deassert Read signal */
dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, 0x00);
@@ -196,7 +195,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, int *data)
return pcie_phy_poll_ack(imx6_pcie, 0);
}
-static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
+static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
{
struct dw_pcie *pci = imx6_pcie->pci;
u32 var;
@@ -253,7 +252,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data)
static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
{
- u32 tmp;
+ u16 tmp;
if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
return;
@@ -620,7 +619,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
{
unsigned long phy_rate = clk_get_rate(imx6_pcie->pcie_phy);
int mult, div;
- u32 val;
+ u16 val;
if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
return 0;
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 15/20] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (13 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 14/20] PCI: imx6: Restrict PHY register data to 16-bit Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 16/20] PCI: imx6: Use common mask in imx6_pcie_reset_phy() Andrey Smirnov
` (5 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Save a couple of lines of code by dropping assignement to 'var' and
passing constants as via function arguments directly. No functional
change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 02342b1762fa..befbc09c9c41 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -172,7 +172,6 @@ static int pcie_phy_wait_ack(struct imx6_pcie *imx6_pcie, int addr)
static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
{
struct dw_pcie *pci = imx6_pcie->pci;
- u32 phy_ctl;
int ret;
ret = pcie_phy_wait_ack(imx6_pcie, addr);
@@ -180,8 +179,7 @@ static int pcie_phy_read(struct imx6_pcie *imx6_pcie, int addr, u16 *data)
return ret;
/* assert Read signal */
- phy_ctl = PCIE_PHY_CTRL_RD;
- dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, phy_ctl);
+ dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, PCIE_PHY_CTRL_RD);
ret = pcie_phy_poll_ack(imx6_pcie, 1);
if (ret)
@@ -219,8 +217,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
return ret;
/* deassert cap data */
- var = PCIE_PHY_CTRL_DATA(data);
- dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
+ dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, PCIE_PHY_CTRL_DATA(data));
/* wait for ack de-assertion */
ret = pcie_phy_poll_ack(imx6_pcie, 0);
@@ -228,8 +225,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
return ret;
/* assert wr signal */
- var = PCIE_PHY_CTRL_WR;
- dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
+ dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, PCIE_PHY_CTRL_WR);
/* wait for ack */
ret = pcie_phy_poll_ack(imx6_pcie, 1);
@@ -237,8 +233,7 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
return ret;
/* deassert wr signal */
- var = PCIE_PHY_CTRL_DATA(data);
- dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, var);
+ dw_pcie_writel_dbi(pci, PCIE_PHY_CTRL, PCIE_PHY_CTRL_DATA(data));
/* wait for ack de-assertion */
ret = pcie_phy_poll_ack(imx6_pcie, 0);
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 16/20] PCI: imx6: Use common mask in imx6_pcie_reset_phy()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (14 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 15/20] PCI: imx6: Pass data to dw_pcie_writel_dbi() directly Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 17/20] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll() Andrey Smirnov
` (4 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Simplify imx6_pcie_reset_phy() by using common mask. No functional
change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index befbc09c9c41..130f577670c8 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -247,21 +247,21 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, u16 data)
static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie)
{
+ const u16 mask = PHY_RX_OVRD_IN_LO_RX_DATA_EN |
+ PHY_RX_OVRD_IN_LO_RX_PLL_EN;
u16 tmp;
if (!(imx6_pcie->drvdata->flags & IMX6_PCIE_FLAG_IMX6_PHY))
return;
pcie_phy_read(imx6_pcie, PHY_RX_OVRD_IN_LO, &tmp);
- tmp |= (PHY_RX_OVRD_IN_LO_RX_DATA_EN |
- PHY_RX_OVRD_IN_LO_RX_PLL_EN);
+ tmp |= mask;
pcie_phy_write(imx6_pcie, PHY_RX_OVRD_IN_LO, tmp);
usleep_range(2000, 3000);
pcie_phy_read(imx6_pcie, PHY_RX_OVRD_IN_LO, &tmp);
- tmp &= ~(PHY_RX_OVRD_IN_LO_RX_DATA_EN |
- PHY_RX_OVRD_IN_LO_RX_PLL_EN);
+ tmp &= ~mask;
pcie_phy_write(imx6_pcie, PHY_RX_OVRD_IN_LO, tmp);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 17/20] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (15 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 16/20] PCI: imx6: Use common mask in imx6_pcie_reset_phy() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 18/20] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link() Andrey Smirnov
` (3 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Simplify bit operations in imx6_setup_phy_mpll() by using
GENMASK/FIELD_PREP. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 16 ++++++----------
1 file changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 130f577670c8..d8aef9da476f 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -113,12 +113,10 @@ struct imx6_pcie {
/* PHY registers (not memory-mapped) */
#define PCIE_PHY_ATEOVRD 0x10
#define PCIE_PHY_ATEOVRD_EN BIT(2)
-#define PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT 0
-#define PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK 0x1
+#define PCIE_PHY_ATEOVRD_REF_CLKDIV BIT(0)
#define PCIE_PHY_MPLL_OVRD_IN_LO 0x11
-#define PCIE_PHY_MPLL_MULTIPLIER_SHIFT 2
-#define PCIE_PHY_MPLL_MULTIPLIER_MASK 0x7f
+#define PCIE_PHY_MPLL_MULTIPLIER GENMASK(8, 2)
#define PCIE_PHY_MPLL_MULTIPLIER_OVRD BIT(9)
#define PHY_RX_OVRD_IN_LO 0x1005
@@ -641,16 +639,14 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie)
}
pcie_phy_read(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, &val);
- val &= ~(PCIE_PHY_MPLL_MULTIPLIER_MASK <<
- PCIE_PHY_MPLL_MULTIPLIER_SHIFT);
- val |= mult << PCIE_PHY_MPLL_MULTIPLIER_SHIFT;
+ val &= ~PCIE_PHY_MPLL_MULTIPLIER;
+ val |= FIELD_PREP(PCIE_PHY_MPLL_MULTIPLIER, mult);
val |= PCIE_PHY_MPLL_MULTIPLIER_OVRD;
pcie_phy_write(imx6_pcie, PCIE_PHY_MPLL_OVRD_IN_LO, val);
pcie_phy_read(imx6_pcie, PCIE_PHY_ATEOVRD, &val);
- val &= ~(PCIE_PHY_ATEOVRD_REF_CLKDIV_MASK <<
- PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT);
- val |= div << PCIE_PHY_ATEOVRD_REF_CLKDIV_SHIFT;
+ val &= ~PCIE_PHY_ATEOVRD_REF_CLKDIV;
+ val |= FIELD_PREP(PCIE_PHY_ATEOVRD_REF_CLKDIV, div);
val |= PCIE_PHY_ATEOVRD_EN;
pcie_phy_write(imx6_pcie, PCIE_PHY_ATEOVRD, val);
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 18/20] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link()
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (16 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 17/20] PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 19/20] PCI: dwc: Make use of GENMASK/FIELD_PREP Andrey Smirnov
` (2 subsequent siblings)
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel
Explicitly define PCIE_RC_LCSR_LINK_SPEED and remove magic numbers
from imx6_pcie_establish_link(). No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pci-imx6.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index d8aef9da476f..f2aca339e9b7 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -96,6 +96,7 @@ struct imx6_pcie {
#define PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK 0xf
#define PCIE_RC_LCSR 0x80
+#define PCIE_RC_LCSR_LINK_SPEED GENMASK(19, 16)
/* PCIe Port Logic registers (memory-mapped) */
#define PL_OFFSET 0x700
@@ -766,8 +767,9 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
dev_info(dev, "Link: Gen2 disabled\n");
}
- tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCSR);
- dev_info(dev, "Link up, Gen%i\n", (tmp >> 16) & 0xf);
+ tmp = FIELD_GET(PCIE_RC_LCSR_LINK_SPEED,
+ dw_pcie_readl_dbi(pci, PCIE_RC_LCSR));
+ dev_info(dev, "Link up, Gen%i\n", tmp);
return 0;
err_reset_phy:
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 19/20] PCI: dwc: Make use of GENMASK/FIELD_PREP
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (17 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 18/20] PCI: imx6: Remove magic numbers from imx6_pcie_establish_link() Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-01-04 17:49 ` [PATCH v2 20/20] PCI: dwc: Remove superfluous shifting in definitions Andrey Smirnov
2019-02-01 16:27 ` [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel,
Gustavo Pimentel
Convert various mult-bit fields to be defined using
GENMASK/FIELD_PREP. This way bit field boundaries are defined in a
single place only as well as defined in a way that makes it easier to
verify them against reference manual. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pcie-designware.h | 29 +++++++++++---------
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 348e91b6daa2..0de653284fca 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -11,6 +11,7 @@
#ifndef _PCIE_DESIGNWARE_H
#define _PCIE_DESIGNWARE_H
+#include <linux/bitfield.h>
#include <linux/dma-mapping.h>
#include <linux/irq.h>
#include <linux/msi.h>
@@ -30,11 +31,12 @@
/* Synopsys-specific PCIe configuration registers */
#define PCIE_PORT_LINK_CONTROL 0x710
-#define PORT_LINK_MODE_MASK (0x3f << 16)
-#define PORT_LINK_MODE_1_LANES (0x1 << 16)
-#define PORT_LINK_MODE_2_LANES (0x3 << 16)
-#define PORT_LINK_MODE_4_LANES (0x7 << 16)
-#define PORT_LINK_MODE_8_LANES (0xf << 16)
+#define PORT_LINK_MODE_MASK GENMASK(21, 16)
+#define PORT_LINK_MODE(n) FIELD_PREP(PORT_LINK_MODE_MASK, n)
+#define PORT_LINK_MODE_1_LANES PORT_LINK_MODE(0x1)
+#define PORT_LINK_MODE_2_LANES PORT_LINK_MODE(0x3)
+#define PORT_LINK_MODE_4_LANES PORT_LINK_MODE(0x7)
+#define PORT_LINK_MODE_8_LANES PORT_LINK_MODE(0xf)
#define PCIE_PORT_DEBUG0 0x728
#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f
@@ -45,11 +47,12 @@
#define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C
#define PORT_LOGIC_SPEED_CHANGE BIT(17)
-#define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8)
-#define PORT_LOGIC_LINK_WIDTH_1_LANES (0x1 << 8)
-#define PORT_LOGIC_LINK_WIDTH_2_LANES (0x2 << 8)
-#define PORT_LOGIC_LINK_WIDTH_4_LANES (0x4 << 8)
-#define PORT_LOGIC_LINK_WIDTH_8_LANES (0x8 << 8)
+#define PORT_LOGIC_LINK_WIDTH_MASK GENMASK(12, 8)
+#define PORT_LOGIC_LINK_WIDTH(n) FIELD_PREP(PORT_LOGIC_LINK_WIDTH_MASK, n)
+#define PORT_LOGIC_LINK_WIDTH_1_LANES PORT_LOGIC_LINK_WIDTH(0x1)
+#define PORT_LOGIC_LINK_WIDTH_2_LANES PORT_LOGIC_LINK_WIDTH(0x2)
+#define PORT_LOGIC_LINK_WIDTH_4_LANES PORT_LOGIC_LINK_WIDTH(0x4)
+#define PORT_LOGIC_LINK_WIDTH_8_LANES PORT_LOGIC_LINK_WIDTH(0x8)
#define PCIE_MSI_ADDR_LO 0x820
#define PCIE_MSI_ADDR_HI 0x824
@@ -75,9 +78,9 @@
#define PCIE_ATU_UPPER_BASE 0x910
#define PCIE_ATU_LIMIT 0x914
#define PCIE_ATU_LOWER_TARGET 0x918
-#define PCIE_ATU_BUS(x) (((x) & 0xff) << 24)
-#define PCIE_ATU_DEV(x) (((x) & 0x1f) << 19)
-#define PCIE_ATU_FUNC(x) (((x) & 0x7) << 16)
+#define PCIE_ATU_BUS(x) FIELD_PREP(GENMASK(31, 24), x)
+#define PCIE_ATU_DEV(x) FIELD_PREP(GENMASK(23, 19), x)
+#define PCIE_ATU_FUNC(x) FIELD_PREP(GENMASK(18, 16), x)
#define PCIE_ATU_UPPER_TARGET 0x91C
#define PCIE_MISC_CONTROL_1_OFF 0x8BC
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* [PATCH v2 20/20] PCI: dwc: Remove superfluous shifting in definitions
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (18 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 19/20] PCI: dwc: Make use of GENMASK/FIELD_PREP Andrey Smirnov
@ 2019-01-04 17:49 ` Andrey Smirnov
2019-02-01 16:27 ` [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
20 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-01-04 17:49 UTC (permalink / raw)
To: linux-pci
Cc: Andrey Smirnov, Lorenzo Pieralisi, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Lucas Stach, Leonard Crestez, A.s. Dong,
Richard Zhu, linux-imx, linux-arm-kernel, linux-kernel,
Gustavo Pimentel
Surrounding definitions no longer use explicit shift, so "<< 0" here
serve no purpose. Remove them. No functional change intended.
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Leonard Crestez <leonard.crestez@nxp.com>
Cc: "A.s. Dong" <aisheng.dong@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-pci@vger.kernel.org
Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
drivers/pci/controller/dwc/pcie-designware.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
index 0de653284fca..636689fd4ee7 100644
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -63,14 +63,14 @@
#define PCIE_ATU_VIEWPORT 0x900
#define PCIE_ATU_REGION_INBOUND BIT(31)
#define PCIE_ATU_REGION_OUTBOUND 0
-#define PCIE_ATU_REGION_INDEX2 (0x2 << 0)
-#define PCIE_ATU_REGION_INDEX1 (0x1 << 0)
-#define PCIE_ATU_REGION_INDEX0 (0x0 << 0)
+#define PCIE_ATU_REGION_INDEX2 0x2
+#define PCIE_ATU_REGION_INDEX1 0x1
+#define PCIE_ATU_REGION_INDEX0 0x0
#define PCIE_ATU_CR1 0x904
-#define PCIE_ATU_TYPE_MEM (0x0 << 0)
-#define PCIE_ATU_TYPE_IO (0x2 << 0)
-#define PCIE_ATU_TYPE_CFG0 (0x4 << 0)
-#define PCIE_ATU_TYPE_CFG1 (0x5 << 0)
+#define PCIE_ATU_TYPE_MEM 0x0
+#define PCIE_ATU_TYPE_IO 0x2
+#define PCIE_ATU_TYPE_CFG0 0x4
+#define PCIE_ATU_TYPE_CFG1 0x5
#define PCIE_ATU_CR2 0x908
#define PCIE_ATU_ENABLE BIT(31)
#define PCIE_ATU_BAR_MODE_ENABLE BIT(30)
--
2.20.1
^ permalink raw reply related [flat|nested] 26+ messages in thread* Re: [PATCH v2 00/20] i.MX6, DesignWare PCI improvements
2019-01-04 17:49 [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Andrey Smirnov
` (19 preceding siblings ...)
2019-01-04 17:49 ` [PATCH v2 20/20] PCI: dwc: Remove superfluous shifting in definitions Andrey Smirnov
@ 2019-02-01 16:27 ` Lorenzo Pieralisi
2019-02-15 0:59 ` Andrey Smirnov
20 siblings, 1 reply; 26+ messages in thread
From: Lorenzo Pieralisi @ 2019-02-01 16:27 UTC (permalink / raw)
To: Andrey Smirnov, Lucas Stach
Cc: linux-pci, Bjorn Helgaas, Fabio Estevam, Chris Healy,
Lucas Stach, Leonard Crestez, A.s. Dong, Richard Zhu, linux-imx,
linux-arm-kernel, linux-kernel
On Fri, Jan 04, 2019 at 09:49:05AM -0800, Andrey Smirnov wrote:
> Everyone:
>
> This is the series containing various small improvements that I made
> while reading the code and researching commit history of pci-imx6.c
> and pcie-designware*.c files. All changes are optional, so commits
> that don't seem like an improvement can be easily dropped. Hopefully
> each patch is self-explanatory.
Side note: You should trim the CC list, eg I do not think CC LKML is
needed at all for this series.
@Lucas: May I ask you to consider please which patches you deem
worth for inclusion ? I will have a look too but I would be grateful
if the driver maintainers can chime in to help.
Thanks,
Lorenzo
> I tested this series on i.MX6Q, i.MX7D and i.MX8MQ.
>
> Feedback is welcome!
>
> Thanks,
> Andrey Smirnov
>
> Changes since [v1]:
>
> - Dropped "PCI: imx6: Drop imx6_pcie_link_up()" due to the matter
> already having been addressed by "PCI: imx6: Fix link training
> status detection in link up check" from Trent Piepho
>
> - Changed "designware" -> "dwc" for all subject lines
>
> - Collected Acked-by's from Gustavo Pimentel
>
> [v1] lkml.kernel.org/r/20181221072716.29017-1-andrew.smirnov@gmail.com
>
> Andrey Smirnov (20):
> PCI: imx6: Simplify imx7d_pcie_wait_for_phy_pll_lock()
> PCI: imx6: Remove redundant debug tracing
> PCI: imx6: Return -ETIMEOUT from imx6_pcie_wait_for_speed_change()
> PCI: imx6: Remove duplicate macro definitions
> PCI: imx6: Remove PCIE_PL_PFLR_* constants
> PCI: imx6: Remove PCIE_PHY_RX_ASIC_OUT* constants
> PCI: dwc: Make use of IS_ALIGNED()
> PCI: dwc: Share code for dw_pcie_rd/wr_other_conf()
> PCI: dwc: imx6: Share PHY debug register definitions
> PCI: dwc: Make use of BIT() in constant definitions
> PCI: imx6: Make use of BIT() in constant definitions
> PCI: imx6: Simplify bit operations in PHY functions
> PCI: imx6: Simplify pcie_phy_poll_ack()
> PCI: imx6: Restrict PHY register data to 16-bit
> PCI: imx6: Pass data to dw_pcie_writel_dbi() directly
> PCI: imx6: Use common mask in imx6_pcie_reset_phy()
> PCI: imx6: Simplify bit operations in imx6_setup_phy_mpll()
> PCI: imx6: Remove magic numbers from imx6_pcie_establish_link()
> PCI: dwc: Make use of GENMASK/FIELD_PREP
> PCI: dwc: Remove superfluous shifting in definitions
>
> drivers/pci/controller/dwc/pci-imx6.c | 139 +++++++-----------
> .../pci/controller/dwc/pcie-designware-host.c | 61 +++-----
> drivers/pci/controller/dwc/pcie-designware.c | 18 +--
> drivers/pci/controller/dwc/pcie-designware.h | 60 ++++----
> 4 files changed, 115 insertions(+), 163 deletions(-)
>
> --
> 2.20.1
>
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH v2 00/20] i.MX6, DesignWare PCI improvements
2019-02-01 16:27 ` [PATCH v2 00/20] i.MX6, DesignWare PCI improvements Lorenzo Pieralisi
@ 2019-02-15 0:59 ` Andrey Smirnov
2019-02-15 10:13 ` Lorenzo Pieralisi
2019-02-19 12:22 ` Lorenzo Pieralisi
0 siblings, 2 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-02-15 0:59 UTC (permalink / raw)
To: Lorenzo Pieralisi
Cc: Lucas Stach, linux-pci, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Leonard Crestez, A.s. Dong, Richard Zhu,
dl-linux-imx, linux-arm-kernel, linux-kernel
On Fri, Feb 1, 2019 at 8:27 AM Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
>
> On Fri, Jan 04, 2019 at 09:49:05AM -0800, Andrey Smirnov wrote:
> > Everyone:
> >
> > This is the series containing various small improvements that I made
> > while reading the code and researching commit history of pci-imx6.c
> > and pcie-designware*.c files. All changes are optional, so commits
> > that don't seem like an improvement can be easily dropped. Hopefully
> > each patch is self-explanatory.
>
> Side note: You should trim the CC list, eg I do not think CC LKML is
> needed at all for this series.
>
I add it because it's always recommended by scripts/get_maintainer.pl
and it really simplifies creating lore references to previous versions
of the patches I sent, that is I don't have to remember which
tree-specific list that series went to.
> @Lucas: May I ask you to consider please which patches you deem
> worth for inclusion ? I will have a look too but I would be grateful
> if the driver maintainers can chime in to help.
>
Lorenzo, can you apply the dwc specific patches that are already
reviewed by Gustavo Pimentel from this series, to keep things moving
while we are waiting on Lucas? I can also spin them out into a
separate series if that's perferable.
Thanks,
Andrey Smirnov
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 00/20] i.MX6, DesignWare PCI improvements
2019-02-15 0:59 ` Andrey Smirnov
@ 2019-02-15 10:13 ` Lorenzo Pieralisi
2019-02-19 12:22 ` Lorenzo Pieralisi
1 sibling, 0 replies; 26+ messages in thread
From: Lorenzo Pieralisi @ 2019-02-15 10:13 UTC (permalink / raw)
To: Andrey Smirnov
Cc: Lucas Stach, linux-pci, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Leonard Crestez, A.s. Dong, Richard Zhu,
dl-linux-imx, linux-arm-kernel, linux-kernel
On Thu, Feb 14, 2019 at 04:59:04PM -0800, Andrey Smirnov wrote:
[...]
> > @Lucas: May I ask you to consider please which patches you deem
> > worth for inclusion ? I will have a look too but I would be grateful
> > if the driver maintainers can chime in to help.
> >
>
> Lorenzo, can you apply the dwc specific patches that are already
> reviewed by Gustavo Pimentel from this series, to keep things moving
> while we are waiting on Lucas? I can also spin them out into a
> separate series if that's perferable.
Yes I can apply them, provided I can cherry-pick them from the series,
otherwise I would ask you please to create a series out of them and send
it so that I can proceed.
Thanks,
Lorenzo
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 00/20] i.MX6, DesignWare PCI improvements
2019-02-15 0:59 ` Andrey Smirnov
2019-02-15 10:13 ` Lorenzo Pieralisi
@ 2019-02-19 12:22 ` Lorenzo Pieralisi
2019-02-19 19:47 ` Andrey Smirnov
1 sibling, 1 reply; 26+ messages in thread
From: Lorenzo Pieralisi @ 2019-02-19 12:22 UTC (permalink / raw)
To: Andrey Smirnov
Cc: Lucas Stach, linux-pci, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Leonard Crestez, A.s. Dong, Richard Zhu,
dl-linux-imx, linux-arm-kernel, linux-kernel
On Thu, Feb 14, 2019 at 04:59:04PM -0800, Andrey Smirnov wrote:
[...]
> Lorenzo, can you apply the dwc specific patches that are already
> reviewed by Gustavo Pimentel from this series, to keep things moving
> while we are waiting on Lucas? I can also spin them out into a
> separate series if that's perferable.
Hi Andrey,
do you have time to respin the series with *only* dwc patches ACK'ed
by Gustavo ? Or it is not doable owing to patches interdependency ?
Please let me know, I would like to reduce the delta by merging what's
ready.
Thanks,
Lorenzo
^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH v2 00/20] i.MX6, DesignWare PCI improvements
2019-02-19 12:22 ` Lorenzo Pieralisi
@ 2019-02-19 19:47 ` Andrey Smirnov
0 siblings, 0 replies; 26+ messages in thread
From: Andrey Smirnov @ 2019-02-19 19:47 UTC (permalink / raw)
To: Lorenzo Pieralisi
Cc: Lucas Stach, linux-pci, Bjorn Helgaas, Fabio Estevam,
Chris Healy, Leonard Crestez, A.s. Dong, Richard Zhu,
dl-linux-imx, linux-arm-kernel, linux-kernel
On Tue, Feb 19, 2019 at 4:22 AM Lorenzo Pieralisi
<lorenzo.pieralisi@arm.com> wrote:
>
> On Thu, Feb 14, 2019 at 04:59:04PM -0800, Andrey Smirnov wrote:
>
> [...]
>
> > Lorenzo, can you apply the dwc specific patches that are already
> > reviewed by Gustavo Pimentel from this series, to keep things moving
> > while we are waiting on Lucas? I can also spin them out into a
> > separate series if that's perferable.
>
> Hi Andrey,
>
> do you have time to respin the series with *only* dwc patches ACK'ed
> by Gustavo ? Or it is not doable owing to patches interdependency ?
>
Sorry for the delay, it's doable and I'll send out a separate series shortly.
Thanks,
Andrey Smirnov
^ permalink raw reply [flat|nested] 26+ messages in thread