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* [PATCH RESEND] PCI: pciehp: Assign ctrl->slot_ctrl before writing it to hardware
@ 2019-01-07 13:09 Mika Westerberg
  2019-01-14 23:10 ` Bjorn Helgaas
  0 siblings, 1 reply; 2+ messages in thread
From: Mika Westerberg @ 2019-01-07 13:09 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: Shameerali Kolothum Thodi, Lukas Wunner, Sinan Kaya, Keith Busch,
	Oza Pawandeep, wangzhou1, Mika Westerberg, linux-pci,
	linux-kernel

Shameerali reported that running v4.20-rc1 as QEMU guest, the PCIe
hotplug port times out during boot:

  pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x03f1 (issued 1016 msec ago)
  pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x03f1 (issued 1024 msec ago)
  pciehp 0000:00:01.0:pcie004: Failed to check link status
  pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x02f1 (issued 2520 msec ago)

The issue was bisected down to commit 720d6a671a6e ("PCI: pciehp: Do not
handle events if interrupts are masked") and was further analyzed by the
reporter to be caused by the fact that pciehp first updates the hardware
and only then cache the ctrl->slot_ctrl in pcie_do_write_cmd(). If the
interrupt happens before we cache the value, pciehp_isr() reads value 0
and decides that the interrupt was not meant for it causing the above
timeout to trigger.

Fix by moving ctrl->slot_ctrl assignment to happen before it is written
to the hardware.

Fixes: 720d6a671a6e ("PCI: pciehp: Do not handle events if interrupts are masked")
Reported-by: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
The original patch was sent 14 Nov 2018 but was never applied so resending.

  https://patchwork.kernel.org/patch/10682715/

 drivers/pci/hotplug/pciehp_hpc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 7dd443aea5a5..cd9eae650aa5 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -156,9 +156,9 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,
 	slot_ctrl |= (cmd & mask);
 	ctrl->cmd_busy = 1;
 	smp_mb();
+	ctrl->slot_ctrl = slot_ctrl;
 	pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
 	ctrl->cmd_started = jiffies;
-	ctrl->slot_ctrl = slot_ctrl;
 
 	/*
 	 * Controllers with the Intel CF118 and similar errata advertise
-- 
2.19.2


^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH RESEND] PCI: pciehp: Assign ctrl->slot_ctrl before writing it to hardware
  2019-01-07 13:09 [PATCH RESEND] PCI: pciehp: Assign ctrl->slot_ctrl before writing it to hardware Mika Westerberg
@ 2019-01-14 23:10 ` Bjorn Helgaas
  0 siblings, 0 replies; 2+ messages in thread
From: Bjorn Helgaas @ 2019-01-14 23:10 UTC (permalink / raw)
  To: Mika Westerberg
  Cc: Shameerali Kolothum Thodi, Lukas Wunner, Sinan Kaya, Keith Busch,
	Oza Pawandeep, wangzhou1, linux-pci, linux-kernel

On Mon, Jan 07, 2019 at 04:09:40PM +0300, Mika Westerberg wrote:
> Shameerali reported that running v4.20-rc1 as QEMU guest, the PCIe
> hotplug port times out during boot:
> 
>   pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x03f1 (issued 1016 msec ago)
>   pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x03f1 (issued 1024 msec ago)
>   pciehp 0000:00:01.0:pcie004: Failed to check link status
>   pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x02f1 (issued 2520 msec ago)
> 
> The issue was bisected down to commit 720d6a671a6e ("PCI: pciehp: Do not
> handle events if interrupts are masked") and was further analyzed by the
> reporter to be caused by the fact that pciehp first updates the hardware
> and only then cache the ctrl->slot_ctrl in pcie_do_write_cmd(). If the
> interrupt happens before we cache the value, pciehp_isr() reads value 0
> and decides that the interrupt was not meant for it causing the above
> timeout to trigger.
> 
> Fix by moving ctrl->slot_ctrl assignment to happen before it is written
> to the hardware.
> 
> Fixes: 720d6a671a6e ("PCI: pciehp: Do not handle events if interrupts are masked")
> Reported-by: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Applied to pci/hotplug for v5.1, thanks!

> ---
> The original patch was sent 14 Nov 2018 but was never applied so resending.
> 
>   https://patchwork.kernel.org/patch/10682715/
> 
>  drivers/pci/hotplug/pciehp_hpc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..cd9eae650aa5 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -156,9 +156,9 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,
>  	slot_ctrl |= (cmd & mask);
>  	ctrl->cmd_busy = 1;
>  	smp_mb();
> +	ctrl->slot_ctrl = slot_ctrl;
>  	pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
>  	ctrl->cmd_started = jiffies;
> -	ctrl->slot_ctrl = slot_ctrl;
>  
>  	/*
>  	 * Controllers with the Intel CF118 and similar errata advertise
> -- 
> 2.19.2
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2019-01-07 13:09 [PATCH RESEND] PCI: pciehp: Assign ctrl->slot_ctrl before writing it to hardware Mika Westerberg
2019-01-14 23:10 ` Bjorn Helgaas

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