Re: [PATCH RESEND] PCI: pciehp: Assign ctrl->slot_ctrl before writing it to hardware

From: Bjorn Helgaas <helgaas@kernel.org>
To: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>,
	Lukas Wunner <lukas@wunner.de>, Sinan Kaya <okaya@codeaurora.org>,
	Keith Busch <keith.busch@intel.com>,
	Oza Pawandeep <poza@codeaurora.org>,
	wangzhou1@hisilicon.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH RESEND] PCI: pciehp: Assign ctrl->slot_ctrl before writing it to hardware
Date: Mon, 14 Jan 2019 17:10:25 -0600	[thread overview]
Message-ID: <20190114231025.GD33971@google.com> (raw)
In-Reply-To: <20190107130940.83680-1-mika.westerberg@linux.intel.com>

On Mon, Jan 07, 2019 at 04:09:40PM +0300, Mika Westerberg wrote:
> Shameerali reported that running v4.20-rc1 as QEMU guest, the PCIe
> hotplug port times out during boot:
> 
>   pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x03f1 (issued 1016 msec ago)
>   pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x03f1 (issued 1024 msec ago)
>   pciehp 0000:00:01.0:pcie004: Failed to check link status
>   pciehp 0000:00:01.0:pcie004: Timeout on hotplug command 0x02f1 (issued 2520 msec ago)
> 
> The issue was bisected down to commit 720d6a671a6e ("PCI: pciehp: Do not
> handle events if interrupts are masked") and was further analyzed by the
> reporter to be caused by the fact that pciehp first updates the hardware
> and only then cache the ctrl->slot_ctrl in pcie_do_write_cmd(). If the
> interrupt happens before we cache the value, pciehp_isr() reads value 0
> and decides that the interrupt was not meant for it causing the above
> timeout to trigger.
> 
> Fix by moving ctrl->slot_ctrl assignment to happen before it is written
> to the hardware.
> 
> Fixes: 720d6a671a6e ("PCI: pciehp: Do not handle events if interrupts are masked")
> Reported-by: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>

Applied to pci/hotplug for v5.1, thanks!

> ---
> The original patch was sent 14 Nov 2018 but was never applied so resending.
> 
>   https://patchwork.kernel.org/patch/10682715/
> 
>  drivers/pci/hotplug/pciehp_hpc.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
> index 7dd443aea5a5..cd9eae650aa5 100644
> --- a/drivers/pci/hotplug/pciehp_hpc.c
> +++ b/drivers/pci/hotplug/pciehp_hpc.c
> @@ -156,9 +156,9 @@ static void pcie_do_write_cmd(struct controller *ctrl, u16 cmd,
>  	slot_ctrl |= (cmd & mask);
>  	ctrl->cmd_busy = 1;
>  	smp_mb();
> +	ctrl->slot_ctrl = slot_ctrl;
>  	pcie_capability_write_word(pdev, PCI_EXP_SLTCTL, slot_ctrl);
>  	ctrl->cmd_started = jiffies;
> -	ctrl->slot_ctrl = slot_ctrl;
>  
>  	/*
>  	 * Controllers with the Intel CF118 and similar errata advertise
> -- 
> 2.19.2
> 