Linux-PCI Archive on lore.kernel.org
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From: Xiaowei Bao <xiaowei.bao@nxp.com>
To: bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com,
	shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com,
	lorenzo.pieralisi@arm.com, arnd@arndb.de,
	gregkh@linuxfoundation.org, minghuan.Lian@nxp.com,
	mingkai.hu@nxp.com, roy.zang@nxp.com,
	kstewart@linuxfoundation.org, cyrille.pitchen@free-electrons.com,
	pombredanne@nexb.com, shawn.lin@rock-chips.com,
	linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linuxppc-dev@lists.ozlabs.org
Cc: Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: [PATCHv6 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode
Date: Tue, 22 Jan 2019 14:33:25 +0800
Message-ID: <20190122063328.25228-1-xiaowei.bao@nxp.com> (raw)

Add the documentation for the Device Tree binding for the layerscape PCIe
controller with EP mode.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Reviewed-by: Minghuan Lian <minghuan.lian@nxp.com>
Reviewed-by: Zhiqiang Hou <zhiqiang.hou@nxp.com>
Reviewed-by: Rob Herring <robh+dt@kernel.org>
---
v2:
 - Add the SoC specific compatibles.
v3:
 - modify the commit message.
v4:
 - no change.
v5:
 - no change.
v6:
 - no change.

 .../devicetree/bindings/pci/layerscape-pci.txt     |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
index 9b2b8d6..e20ceaa 100644
--- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt
+++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt
@@ -13,6 +13,7 @@ information.
 
 Required properties:
 - compatible: should contain the platform identifier such as:
+  RC mode:
         "fsl,ls1021a-pcie"
         "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"
         "fsl,ls2088a-pcie"
@@ -20,6 +21,8 @@ Required properties:
         "fsl,ls1046a-pcie"
         "fsl,ls1043a-pcie"
         "fsl,ls1012a-pcie"
+  EP mode:
+	"fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"
 - reg: base addresses and lengths of the PCIe controller register blocks.
 - interrupts: A list of interrupt outputs of the controller. Must contain an
   entry for each entry in the interrupt-names property.
-- 
1.7.1


             reply index

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-22  6:33 Xiaowei Bao [this message]
2019-01-22  6:33 ` [PATCHv6 2/4] arm64: dts: Add the PCIE EP node in dts Xiaowei Bao
2019-01-22  6:33 ` [PATCHv6 3/4] pci: layerscape: Add the EP mode support Xiaowei Bao
2019-02-19 11:27   ` Lorenzo Pieralisi
2019-02-20  3:09     ` Xiaowei Bao
2019-02-20 10:06       ` Lorenzo Pieralisi
2019-02-21  3:18         ` Xiaowei Bao
2019-01-22  6:33 ` [PATCHv6 4/4] misc: pci_endpoint_test: Add the layerscape EP device support Xiaowei Bao
2019-02-05 18:02 ` [PATCHv6 1/4] dt-bindings: add DT binding for the layerscape PCIe controller with EP mode Lorenzo Pieralisi
2019-02-19  6:57   ` Xiaowei Bao

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