linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
	"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
	"will.deacon@arm.com" <will.deacon@arm.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>,
	"M.h. Lian" <minghuan.lian@nxp.com>,
	Xiaowei Bao <xiaowei.bao@nxp.com>,
	"Z.q. Hou" <zhiqiang.hou@nxp.com>
Subject: [PATCHv3 03/27] PCI: mobiveil: correct the returned error number
Date: Tue, 29 Jan 2019 08:08:47 +0000	[thread overview]
Message-ID: <20190129080926.36773-4-Zhiqiang.Hou@nxp.com> (raw)
In-Reply-To: <20190129080926.36773-1-Zhiqiang.Hou@nxp.com>

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

This patch corrected the returned error number by convention,
and removed a unnecessary error check.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Minghuan Lian <Minghuan.Lian@nxp.com>
---
V3:
 - No change

 drivers/pci/controller/pcie-mobiveil.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c
index b87471f08a40..563210e731d3 100644
--- a/drivers/pci/controller/pcie-mobiveil.c
+++ b/drivers/pci/controller/pcie-mobiveil.c
@@ -819,7 +819,7 @@ static int mobiveil_pcie_init_irq_domain(struct mobiveil_pcie *pcie)
 
 	if (!pcie->intx_domain) {
 		dev_err(dev, "Failed to get a INTx IRQ domain\n");
-		return -ENODEV;
+		return -ENOMEM;
 	}
 
 	raw_spin_lock_init(&pcie->intx_mask_lock);
@@ -845,11 +845,9 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 	/* allocate the PCIe port */
 	bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie));
 	if (!bridge)
-		return -ENODEV;
+		return -ENOMEM;
 
 	pcie = pci_host_bridge_priv(bridge);
-	if (!pcie)
-		return -ENOMEM;
 
 	pcie->pdev = pdev;
 
@@ -866,7 +864,7 @@ static int mobiveil_pcie_probe(struct platform_device *pdev)
 						    &pcie->resources, &iobase);
 	if (ret) {
 		dev_err(dev, "Getting bridge resources failed\n");
-		return -ENOMEM;
+		return ret;
 	}
 
 	/*
-- 
2.17.1


  parent reply	other threads:[~2019-01-29  8:09 UTC|newest]

Thread overview: 68+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-29  8:08 [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Z.q. Hou
2019-01-29  8:08 ` [PATCHv3 01/27] PCI: mobiveil: uniform the register accessors Z.q. Hou
2019-02-05  5:39   ` Subrahmanya Lingappa
2019-02-05 17:43     ` Lorenzo Pieralisi
2019-02-06 10:59       ` Subrahmanya Lingappa
2019-01-29  8:08 ` [PATCHv3 02/27] PCI: mobiveil: format the code without function change Z.q. Hou
2019-02-05  5:48   ` Subrahmanya Lingappa
2019-02-18  7:03     ` Z.q. Hou
2019-01-29  8:08 ` Z.q. Hou [this message]
2019-02-05  5:53   ` [PATCHv3 03/27] PCI: mobiveil: correct the returned error number Subrahmanya Lingappa
2019-01-29  8:08 ` [PATCHv3 04/27] PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI Z.q. Hou
2019-02-05  6:05   ` Subrahmanya Lingappa
2019-02-18  7:03     ` Z.q. Hou
2019-01-29  8:09 ` [PATCHv3 05/27] PCI: mobiveil: correct PCI base address in MEM/IO outbound windows Z.q. Hou
2019-02-05  6:06   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 06/27] PCI: mobiveil: replace the resource list iteration function Z.q. Hou
2019-02-05  6:07   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 07/27] PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window Z.q. Hou
2019-02-05  6:08   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 08/27] PCI: mobiveil: use the 1st inbound window for MEM inbound transactions Z.q. Hou
2019-02-05  6:08   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 09/27] PCI: mobiveil: correct inbound/outbound window setup routines Z.q. Hou
2019-02-05  6:10   ` Subrahmanya Lingappa
2019-02-18  7:07     ` Z.q. Hou
2019-01-29  8:09 ` [PATCHv3 10/27] PCI: mobiveil: fix the INTx process error Z.q. Hou
2019-02-05  6:11   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 11/27] PCI: mobiveil: only fix up the Class Code field Z.q. Hou
2019-02-05  6:11   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 12/27] PCI: mobiveil: move out the link up waiting from mobiveil_host_init Z.q. Hou
2019-02-05  6:12   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 13/27] PCI: mobiveil: move irq chained handler setup out of DT parse Z.q. Hou
2019-02-08 12:30   ` Subrahmanya Lingappa
2019-01-29  8:09 ` [PATCHv3 14/27] PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number Z.q. Hou
2019-02-08 12:31   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 15/27] dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional Z.q. Hou
2019-02-08 12:32   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 16/27] PCI: mobiveil: refactor Mobiveil PCIe Host Bridge IP driver Z.q. Hou
2019-02-08 12:37   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 17/27] PCI: mobiveil: fix the checking of valid device Z.q. Hou
2019-02-08 12:41   ` Subrahmanya Lingappa
2019-02-08 14:13     ` Bjorn Helgaas
2019-02-18  7:15       ` Z.q. Hou
2019-02-18  7:04     ` Z.q. Hou
2019-01-29  8:10 ` [PATCHv3 18/27] PCI: mobiveil: continue to initialize the host upon no PCIe link Z.q. Hou
2019-02-08 12:41   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 19/27] PCI: mobiveil: disabled IB and OB windows set by bootloader Z.q. Hou
2019-02-08 12:42   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 20/27] PCI: mobiveil: add Byte and Half-Word width register accessors Z.q. Hou
2019-02-08 12:44   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 21/27] PCI: mobiveil: make mobiveil_host_init can be used to re-init host Z.q. Hou
2019-02-08 12:46   ` Subrahmanya Lingappa
2019-01-29  8:10 ` [PATCHv3 22/27] dt-bindings: pci: Add NXP Layerscape SoCs PCIe Gen4 controller Z.q. Hou
2019-01-30 18:49   ` Rob Herring
2019-01-29  8:10 ` [PATCHv3 23/27] PCI: mobiveil: add PCIe Gen4 RC driver for NXP Layerscape SoCs Z.q. Hou
2019-02-08 12:49   ` Subrahmanya Lingappa
2019-02-18  7:05     ` Z.q. Hou
2019-01-29  8:11 ` [PATCHv3 24/27] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011577 Z.q. Hou
2019-02-08 12:52   ` Subrahmanya Lingappa
2019-02-18  7:10     ` Z.q. Hou
2019-01-29  8:11 ` [PATCHv3 25/27] PCI: mobiveil: ls_pcie_g4: add Workaround for A-011451 Z.q. Hou
2019-02-08 12:53   ` Subrahmanya Lingappa
2019-02-18  7:14     ` Z.q. Hou
2019-01-29  8:11 ` [PATCHv3 26/27] arm64: dts: freescale: lx2160a: add pcie DT nodes Z.q. Hou
2019-01-29  8:11 ` [PATCHv3 27/27] arm64: defconfig: Enable CONFIG_PCI_LAYERSCAPE_GEN4 Z.q. Hou
2019-01-29 11:39 ` [PATCHv3 00/27] PCI: refactor Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs Lorenzo Pieralisi
     [not found]   ` <CAFZiPx002HED+YH2GysS7a7uoEDQuHGjxa_CQtwb9nSDH-XNuA@mail.gmail.com>
2019-02-04 16:13     ` Lorenzo Pieralisi
2019-02-04 16:51       ` Subrahmanya Lingappa
2019-01-30 15:34 ` Bjorn Helgaas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190129080926.36773-4-Zhiqiang.Hou@nxp.com \
    --to=zhiqiang.hou@nxp.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=devicetree@vger.kernel.org \
    --cc=l.subrahmanya@mobiveil.co.in \
    --cc=leoyang.li@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=minghuan.lian@nxp.com \
    --cc=mingkai.hu@nxp.com \
    --cc=robh+dt@kernel.org \
    --cc=shawnguo@kernel.org \
    --cc=will.deacon@arm.com \
    --cc=xiaowei.bao@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).