From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED, USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DF61C282D7 for ; Wed, 30 Jan 2019 12:33:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 5789220882 for ; Wed, 30 Jan 2019 12:33:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726210AbfA3Mdw (ORCPT ); Wed, 30 Jan 2019 07:33:52 -0500 Received: from foss.arm.com ([217.140.101.70]:53504 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725768AbfA3Mdw (ORCPT ); Wed, 30 Jan 2019 07:33:52 -0500 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 866ECEBD; Wed, 30 Jan 2019 04:33:51 -0800 (PST) Received: from e107981-ln.cambridge.arm.com (e107981-ln.cambridge.arm.com [10.1.197.40]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DD1BC3F557; Wed, 30 Jan 2019 04:33:49 -0800 (PST) Date: Wed, 30 Jan 2019 12:33:47 +0000 From: Lorenzo Pieralisi To: honghui.zhang@mediatek.com Cc: bhelgaas@google.com, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ryder.lee@mediatek.com, youlin.pei@mediatek.com, jianjun.wang@mediatek.com Subject: Re: [PATCH] PCI: Mediatek: Use resource_size function on resource object Message-ID: <20190130123347.GB30991@e107981-ln.cambridge.arm.com> References: <1546409033-20412-1-git-send-email-honghui.zhang@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1546409033-20412-1-git-send-email-honghui.zhang@mediatek.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Wed, Jan 02, 2019 at 02:03:53PM +0800, honghui.zhang@mediatek.com wrote: > From: Honghui Zhang > > drivers/pci/pcie-mediatek.c:720:13-16: WARNING: Suspicious code. resource_size is maybe missing with mem > > Generated by: scripts/coccinelle/api/resource_size.cocci > > Signed-off-by: Honghui Zhang > --- > drivers/pci/controller/pcie-mediatek.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c > index e307166..0168376 100644 > --- a/drivers/pci/controller/pcie-mediatek.c > +++ b/drivers/pci/controller/pcie-mediatek.c > @@ -654,7 +654,6 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > struct resource *mem = &pcie->mem; > const struct mtk_pcie_soc *soc = port->pcie->soc; > u32 val; > - size_t size; > int err; > > /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */ > @@ -706,8 +705,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) > mtk_pcie_enable_msi(port); > > /* Set AHB to PCIe translation windows */ > - size = mem->end - mem->start; > - val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(size)); > + val = lower_32_bits(mem->start) | AHB2PCIE_SIZE(fls(resource_size(mem))); checkpatch warns on this line, please make sure patches pass it before posting them. I will fix it up myself but please pay attention next time. Thanks, Lorenzo > writel(val, port->base + PCIE_AHB_TRANS_BASE0_L); > > val = upper_32_bits(mem->start); > -- > 2.6.4 >