From: "Raj, Ashok" <ashok.raj@intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "sathyanarayanan.kuppuswamy@linux.intel.com"
<sathyanarayanan.kuppuswamy@linux.intel.com>,
"bhelgaas@google.com" <bhelgaas@google.com>,
"joro@8bytes.org" <joro@8bytes.org>,
"dwmw2@infradead.org" <dwmw2@infradead.org>,
"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Busch, Keith" <keith.busch@intel.com>,
"iommu@lists.linux-foundation.org"
<iommu@lists.linux-foundation.org>,
"Pan, Jacob jun" <jacob.jun.pan@intel.com>
Subject: Re: [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response.
Date: Wed, 13 Feb 2019 10:10:46 -0800 [thread overview]
Message-ID: <20190213181046.GA16999@araj-mobl1.jf.intel.com> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D19C93AD90@SHSMSX104.ccr.corp.intel.com>
On Wed, Feb 13, 2019 at 12:26:33AM -0800, Tian, Kevin wrote:
> >
> > diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> > index 1457f931218e..af2e4a011787 100644
> > --- a/drivers/iommu/intel-iommu.c
> > +++ b/drivers/iommu/intel-iommu.c
> > @@ -1399,7 +1399,8 @@ static void iommu_enable_dev_iotlb(struct
> > device_domain_info *info)
> > undefined. So always enable PASID support on devices which
> > have it, even if we can't yet know if we're ever going to
> > use it. */
> > - if (info->pasid_supported && !pci_enable_pasid(pdev, info-
> > >pasid_supported & ~1))
> > + if (info->pasid_supported && pci_prg_resp_pasid_required(pdev)
> > &&
> > + !pci_enable_pasid(pdev, info->pasid_supported & ~1))
> > info->pasid_enabled = 1;
>
> Above logic looks problematic. As Dave commented in another thread,
> PRI and PASID are orthogonal capabilities. Especially with introduction
> of VT-d scalable mode, PASID will be used alone even w/o PRI...
>
> Why not doing the check when PRI is actually enabled? At that point
> you can fail the request if above condition is false.
>
That makes sense.
next prev parent reply other threads:[~2019-02-13 18:10 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-11 21:50 [PATCH v2 0/2] Add PGR response PASID requirement check in Intel IOMMU sathyanarayanan.kuppuswamy
2019-02-11 21:50 ` [PATCH v2 1/2] PCI/ATS: Add pci_prg_resp_pasid_required() interface sathyanarayanan.kuppuswamy
2019-02-13 19:49 ` Bjorn Helgaas
2019-02-11 21:50 ` [PATCH v2 2/2] iommu/vt-d: Enable PASID only if device expects PASID in PRG Response sathyanarayanan.kuppuswamy
2019-02-13 8:26 ` Tian, Kevin
2019-02-13 18:10 ` Raj, Ashok [this message]
2019-02-13 18:19 ` sathyanarayanan kuppuswamy
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190213181046.GA16999@araj-mobl1.jf.intel.com \
--to=ashok.raj@intel.com \
--cc=bhelgaas@google.com \
--cc=dwmw2@infradead.org \
--cc=iommu@lists.linux-foundation.org \
--cc=jacob.jun.pan@intel.com \
--cc=joro@8bytes.org \
--cc=keith.busch@intel.com \
--cc=kevin.tian@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=sathyanarayanan.kuppuswamy@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).