From: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
To: will.deacon@arm.com, lorenzo.pieralisi@arm.com, bhelgaas@google.com
Cc: iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org,
robin.murphy@arm.com, joro@8bytes.org, hanjun.guo@linaro.org,
sudeep.holla@arm.com, rjw@rjwysocki.net, lenb@kernel.org,
okaya@kernel.org, zhongmiao@hisilicon.com, eric.auger@redhat.com,
linux-pci@vger.kernel.org
Subject: [PATCH v3 5/9] iommu/arm-smmu-v3: Store SteamIDs in master
Date: Wed, 17 Apr 2019 19:24:44 +0100 [thread overview]
Message-ID: <20190417182448.12382-6-jean-philippe.brucker@arm.com> (raw)
In-Reply-To: <20190417182448.12382-1-jean-philippe.brucker@arm.com>
Simplify the attach/detach code a bit by keeping a pointer to the stream
IDs in the master structure. Although not completely obvious here, it does
make the subsequent support for ATS, PRI and PASID a bit simpler.
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
---
drivers/iommu/arm-smmu-v3.c | 30 +++++++++++++++---------------
1 file changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 50cb037f3d8a..25ba546cae7f 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -594,6 +594,8 @@ struct arm_smmu_device {
struct arm_smmu_master {
struct arm_smmu_device *smmu;
struct arm_smmu_strtab_ent ste;
+ u32 *sids;
+ unsigned int num_sids;
};
/* SMMU private data for an IOMMU domain */
@@ -1688,19 +1690,18 @@ static __le64 *arm_smmu_get_step_for_sid(struct arm_smmu_device *smmu, u32 sid)
return step;
}
-static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
+static void arm_smmu_install_ste_for_dev(struct arm_smmu_master *master)
{
int i, j;
- struct arm_smmu_master *master = fwspec->iommu_priv;
struct arm_smmu_device *smmu = master->smmu;
- for (i = 0; i < fwspec->num_ids; ++i) {
- u32 sid = fwspec->ids[i];
+ for (i = 0; i < master->num_sids; ++i) {
+ u32 sid = master->sids[i];
__le64 *step = arm_smmu_get_step_for_sid(smmu, sid);
/* Bridged PCI devices may end up with duplicated IDs */
for (j = 0; j < i; j++)
- if (fwspec->ids[j] == sid)
+ if (master->sids[j] == sid)
break;
if (j < i)
continue;
@@ -1709,13 +1710,10 @@ static void arm_smmu_install_ste_for_dev(struct iommu_fwspec *fwspec)
}
}
-static void arm_smmu_detach_dev(struct device *dev)
+static void arm_smmu_detach_dev(struct arm_smmu_master *master)
{
- struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
- struct arm_smmu_master *master = fwspec->iommu_priv;
-
master->ste.assigned = false;
- arm_smmu_install_ste_for_dev(fwspec);
+ arm_smmu_install_ste_for_dev(master);
}
static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
@@ -1736,7 +1734,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
/* Already attached to a different domain? */
if (ste->assigned)
- arm_smmu_detach_dev(dev);
+ arm_smmu_detach_dev(master);
mutex_lock(&smmu_domain->init_mutex);
@@ -1770,7 +1768,7 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
ste->s2_cfg = &smmu_domain->s2_cfg;
}
- arm_smmu_install_ste_for_dev(fwspec);
+ arm_smmu_install_ste_for_dev(master);
out_unlock:
mutex_unlock(&smmu_domain->init_mutex);
return ret;
@@ -1883,12 +1881,14 @@ static int arm_smmu_add_device(struct device *dev)
return -ENOMEM;
master->smmu = smmu;
+ master->sids = fwspec->ids;
+ master->num_sids = fwspec->num_ids;
fwspec->iommu_priv = master;
}
/* Check the SIDs are in range of the SMMU and our stream table */
- for (i = 0; i < fwspec->num_ids; i++) {
- u32 sid = fwspec->ids[i];
+ for (i = 0; i < master->num_sids; i++) {
+ u32 sid = master->sids[i];
if (!arm_smmu_sid_in_range(smmu, sid))
return -ERANGE;
@@ -1922,7 +1922,7 @@ static void arm_smmu_remove_device(struct device *dev)
master = fwspec->iommu_priv;
smmu = master->smmu;
if (master && master->ste.assigned)
- arm_smmu_detach_dev(dev);
+ arm_smmu_detach_dev(master);
iommu_group_remove_device(dev);
iommu_device_unlink(&smmu->iommu, dev);
kfree(master);
--
2.21.0
next prev parent reply other threads:[~2019-04-17 18:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-17 18:24 [PATCH v3 0/9] Add PCI ATS support to Arm SMMUv3 Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 1/9] PCI: Move ATS declarations outside of CONFIG_PCI Jean-Philippe Brucker
2019-04-17 19:47 ` Bjorn Helgaas
2019-04-17 18:24 ` [PATCH v3 2/9] PCI: Add a stub for pci_ats_disabled() Jean-Philippe Brucker
2019-04-17 19:48 ` Bjorn Helgaas
2019-04-17 18:24 ` [PATCH v3 3/9] ACPI/IORT: Check ATS capability in root complex nodes Jean-Philippe Brucker
2019-04-18 11:20 ` Lorenzo Pieralisi
2019-04-17 18:24 ` [PATCH v3 4/9] iommu/arm-smmu-v3: Rename arm_smmu_master_data to arm_smmu_master Jean-Philippe Brucker
2019-04-17 18:24 ` Jean-Philippe Brucker [this message]
2019-04-17 18:24 ` [PATCH v3 6/9] iommu/arm-smmu-v3: Add a master->domain pointer Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 7/9] iommu/arm-smmu-v3: Link domains and devices Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 8/9] iommu/arm-smmu-v3: Add support for PCI ATS Jean-Philippe Brucker
2019-07-01 17:41 ` Robin Murphy
2019-07-02 14:59 ` Jean-Philippe Brucker
2019-04-17 18:24 ` [PATCH v3 9/9] iommu/arm-smmu-v3: Disable tagged pointers Jean-Philippe Brucker
2019-04-23 11:21 ` [PATCH v3 0/9] Add PCI ATS support to Arm SMMUv3 Will Deacon
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