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* [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
@ 2019-04-19  2:58 Yue Haibing
  2019-04-19 13:31 ` Bjorn Helgaas
  0 siblings, 1 reply; 7+ messages in thread
From: Yue Haibing @ 2019-04-19  2:58 UTC (permalink / raw)
  To: lorenzo.pieralisi, bhelgaas, kishon, robh, l.stach, andrew.smirnov
  Cc: linux-kernel, linux-pci, YueHaibing

From: YueHaibing <yuehaibing@huawei.com>

During randconfig builds, I occasionally run into an invalid configuration

drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_link_up':
pci-keystone.c:(.text+0x90): undefined reference to `__dw_pcie_read_dbi'
pci-keystone.c:(.text+0x90): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_read_dbi'
drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_v3_65_scan_bus':
pci-keystone.c:(.text+0x4f0): undefined reference to `__dw_pcie_write_dbi'
pci-keystone.c:(.text+0x4f0): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_write_dbi'

while CONFIG_PCI_KEYSTONE is selected but CONFIG_PCIE_DW
is not set, the building failed like this. This patch
selects PCIE_DW to fix it.

Reported-by: Hulk Robot <hulkci@huawei.com>
Fixes: 5709114f0a97 ("PCI: keystone: Add support for PCIe EP in AM654x Platforms")
Signed-off-by: YueHaibing <yuehaibing@huawei.com>
---
 drivers/pci/controller/dwc/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index b450ad2..641fa0f 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -105,6 +105,7 @@ config PCIE_SPEAR13XX
 config PCI_KEYSTONE
 	bool "TI Keystone PCIe controller"
 	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
+	select PCIE_DW
 	help
 	  Say Y here if you want to enable PCI controller support on Keystone
 	  SoCs. The PCI controller on Keystone is based on DesignWare hardware
-- 
2.7.4



^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
  2019-04-19  2:58 [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set Yue Haibing
@ 2019-04-19 13:31 ` Bjorn Helgaas
  2019-04-19 13:46   ` YueHaibing
  0 siblings, 1 reply; 7+ messages in thread
From: Bjorn Helgaas @ 2019-04-19 13:31 UTC (permalink / raw)
  To: Yue Haibing
  Cc: lorenzo.pieralisi, kishon, robh, l.stach, andrew.smirnov,
	linux-kernel, linux-pci

On Fri, Apr 19, 2019 at 10:58:55AM +0800, Yue Haibing wrote:
> From: YueHaibing <yuehaibing@huawei.com>
> 
> During randconfig builds, I occasionally run into an invalid configuration
> 
> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_link_up':
> pci-keystone.c:(.text+0x90): undefined reference to `__dw_pcie_read_dbi'
> pci-keystone.c:(.text+0x90): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_read_dbi'
> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_v3_65_scan_bus':
> pci-keystone.c:(.text+0x4f0): undefined reference to `__dw_pcie_write_dbi'
> pci-keystone.c:(.text+0x4f0): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_write_dbi'
> 
> while CONFIG_PCI_KEYSTONE is selected but CONFIG_PCIE_DW
> is not set, the building failed like this. This patch
> selects PCIE_DW to fix it.
> 
> Reported-by: Hulk Robot <hulkci@huawei.com>
> Fixes: 5709114f0a97 ("PCI: keystone: Add support for PCIe EP in AM654x Platforms")
> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
> ---
>  drivers/pci/controller/dwc/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> index b450ad2..641fa0f 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -105,6 +105,7 @@ config PCIE_SPEAR13XX
>  config PCI_KEYSTONE
>  	bool "TI Keystone PCIe controller"
>  	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
> +	select PCIE_DW

What version are you building?  In v5.0, PCI_KEYSTONE already selects
PCIE_DW_HOST:

$ git grep -A4 PCI_KEYSTONE v5.0:drivers/pci/controller/dwc/Kconfig | cat
v5.0:drivers/pci/controller/dwc/Kconfig:config PCI_KEYSTONE
v5.0:drivers/pci/controller/dwc/Kconfig-	bool "TI Keystone PCIe controller"
v5.0:drivers/pci/controller/dwc/Kconfig-	depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
v5.0:drivers/pci/controller/dwc/Kconfig-	depends on PCI_MSI_IRQ_DOMAIN
v5.0:drivers/pci/controller/dwc/Kconfig-	select PCIE_DW_HOST
08:30:42 ~/history (master)$

>  	help
>  	  Say Y here if you want to enable PCI controller support on Keystone
>  	  SoCs. The PCI controller on Keystone is based on DesignWare hardware
> -- 
> 2.7.4
> 
> 

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
  2019-04-19 13:31 ` Bjorn Helgaas
@ 2019-04-19 13:46   ` YueHaibing
  2019-04-19 17:47     ` Bjorn Helgaas
  0 siblings, 1 reply; 7+ messages in thread
From: YueHaibing @ 2019-04-19 13:46 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: lorenzo.pieralisi, kishon, robh, l.stach, andrew.smirnov,
	linux-kernel, linux-pci

On 2019/4/19 21:31, Bjorn Helgaas wrote:
> On Fri, Apr 19, 2019 at 10:58:55AM +0800, Yue Haibing wrote:
>> From: YueHaibing <yuehaibing@huawei.com>
>>
>> During randconfig builds, I occasionally run into an invalid configuration
>>
>> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_link_up':
>> pci-keystone.c:(.text+0x90): undefined reference to `__dw_pcie_read_dbi'
>> pci-keystone.c:(.text+0x90): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_read_dbi'
>> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_v3_65_scan_bus':
>> pci-keystone.c:(.text+0x4f0): undefined reference to `__dw_pcie_write_dbi'
>> pci-keystone.c:(.text+0x4f0): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_write_dbi'
>>
>> while CONFIG_PCI_KEYSTONE is selected but CONFIG_PCIE_DW
>> is not set, the building failed like this. This patch
>> selects PCIE_DW to fix it.
>>
>> Reported-by: Hulk Robot <hulkci@huawei.com>
>> Fixes: 5709114f0a97 ("PCI: keystone: Add support for PCIe EP in AM654x Platforms")
>> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
>> ---
>>  drivers/pci/controller/dwc/Kconfig | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
>> index b450ad2..641fa0f 100644
>> --- a/drivers/pci/controller/dwc/Kconfig
>> +++ b/drivers/pci/controller/dwc/Kconfig
>> @@ -105,6 +105,7 @@ config PCIE_SPEAR13XX
>>  config PCI_KEYSTONE
>>  	bool "TI Keystone PCIe controller"
>>  	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
>> +	select PCIE_DW
> 
> What version are you building?  In v5.0, PCI_KEYSTONE already selects
> PCIE_DW_HOST:
> 
> $ git grep -A4 PCI_KEYSTONE v5.0:drivers/pci/controller/dwc/Kconfig | cat
> v5.0:drivers/pci/controller/dwc/Kconfig:config PCI_KEYSTONE
> v5.0:drivers/pci/controller/dwc/Kconfig-	bool "TI Keystone PCIe controller"
> v5.0:drivers/pci/controller/dwc/Kconfig-	depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
> v5.0:drivers/pci/controller/dwc/Kconfig-	depends on PCI_MSI_IRQ_DOMAIN
> v5.0:drivers/pci/controller/dwc/Kconfig-	select PCIE_DW_HOST
> 08:30:42 ~/history (master)$

This patch based on linux-next:

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=5709114f0a97

> 
>>  	help
>>  	  Say Y here if you want to enable PCI controller support on Keystone
>>  	  SoCs. The PCI controller on Keystone is based on DesignWare hardware
>> -- 
>> 2.7.4
>>
>>
> 
> .
> 


^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
  2019-04-19 13:46   ` YueHaibing
@ 2019-04-19 17:47     ` Bjorn Helgaas
  2019-04-22  7:49       ` Kishon Vijay Abraham I
  0 siblings, 1 reply; 7+ messages in thread
From: Bjorn Helgaas @ 2019-04-19 17:47 UTC (permalink / raw)
  To: YueHaibing
  Cc: lorenzo.pieralisi, kishon, robh, l.stach, andrew.smirnov,
	linux-kernel, linux-pci

On Fri, Apr 19, 2019 at 09:46:39PM +0800, YueHaibing wrote:
> On 2019/4/19 21:31, Bjorn Helgaas wrote:
> > On Fri, Apr 19, 2019 at 10:58:55AM +0800, Yue Haibing wrote:
> >> From: YueHaibing <yuehaibing@huawei.com>
> >>
> >> During randconfig builds, I occasionally run into an invalid configuration
> >>
> >> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_link_up':
> >> pci-keystone.c:(.text+0x90): undefined reference to `__dw_pcie_read_dbi'
> >> pci-keystone.c:(.text+0x90): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_read_dbi'
> >> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_v3_65_scan_bus':
> >> pci-keystone.c:(.text+0x4f0): undefined reference to `__dw_pcie_write_dbi'
> >> pci-keystone.c:(.text+0x4f0): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_write_dbi'
> >>
> >> while CONFIG_PCI_KEYSTONE is selected but CONFIG_PCIE_DW
> >> is not set, the building failed like this. This patch
> >> selects PCIE_DW to fix it.
> >>
> >> Reported-by: Hulk Robot <hulkci@huawei.com>
> >> Fixes: 5709114f0a97 ("PCI: keystone: Add support for PCIe EP in AM654x Platforms")
> >> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
> >> ---
> >>  drivers/pci/controller/dwc/Kconfig | 1 +
> >>  1 file changed, 1 insertion(+)
> >>
> >> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
> >> index b450ad2..641fa0f 100644
> >> --- a/drivers/pci/controller/dwc/Kconfig
> >> +++ b/drivers/pci/controller/dwc/Kconfig
> >> @@ -105,6 +105,7 @@ config PCIE_SPEAR13XX
> >>  config PCI_KEYSTONE
> >>  	bool "TI Keystone PCIe controller"
> >>  	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
> >> +	select PCIE_DW
> > 
> > What version are you building?  In v5.0, PCI_KEYSTONE already selects
> > PCIE_DW_HOST:
> > 
> > $ git grep -A4 PCI_KEYSTONE v5.0:drivers/pci/controller/dwc/Kconfig | cat
> > v5.0:drivers/pci/controller/dwc/Kconfig:config PCI_KEYSTONE
> > v5.0:drivers/pci/controller/dwc/Kconfig-	bool "TI Keystone PCIe controller"
> > v5.0:drivers/pci/controller/dwc/Kconfig-	depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
> > v5.0:drivers/pci/controller/dwc/Kconfig-	depends on PCI_MSI_IRQ_DOMAIN
> > v5.0:drivers/pci/controller/dwc/Kconfig-	select PCIE_DW_HOST
> > 08:30:42 ~/history (master)$
> 
> This patch based on linux-next:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=5709114f0a97

Oh, yep, looks like this was broken by ad5ca801bd7e ("PCI: keystone:
Add support for PCIe EP in AM654x Platforms"), which added
PCI_KEYSTONE_HOST and PCI_KEYSTONE_EP.  Those select PCIE_DW_HOST and
PCIE_DW_EP, respectively, which in turn select PCIE_DW.

But I guess it's possible to enable PCI_KEYSTONE by itself without
either PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP.  I'm not sure what that
would mean, but we would still try to build pci-keystone.o

I'm hoping we can amend that commit before the merge window.

Bjorn

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
  2019-04-19 17:47     ` Bjorn Helgaas
@ 2019-04-22  7:49       ` Kishon Vijay Abraham I
  2019-04-22 13:26         ` Bjorn Helgaas
  0 siblings, 1 reply; 7+ messages in thread
From: Kishon Vijay Abraham I @ 2019-04-22  7:49 UTC (permalink / raw)
  To: Bjorn Helgaas, YueHaibing
  Cc: lorenzo.pieralisi, robh, l.stach, andrew.smirnov, linux-kernel,
	linux-pci

Hi Bjorn,

On 19/04/19 11:17 PM, Bjorn Helgaas wrote:
> On Fri, Apr 19, 2019 at 09:46:39PM +0800, YueHaibing wrote:
>> On 2019/4/19 21:31, Bjorn Helgaas wrote:
>>> On Fri, Apr 19, 2019 at 10:58:55AM +0800, Yue Haibing wrote:
>>>> From: YueHaibing <yuehaibing@huawei.com>
>>>>
>>>> During randconfig builds, I occasionally run into an invalid configuration
>>>>
>>>> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_link_up':
>>>> pci-keystone.c:(.text+0x90): undefined reference to `__dw_pcie_read_dbi'
>>>> pci-keystone.c:(.text+0x90): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_read_dbi'
>>>> drivers/pci/controller/dwc/pci-keystone.o: In function `ks_pcie_v3_65_scan_bus':
>>>> pci-keystone.c:(.text+0x4f0): undefined reference to `__dw_pcie_write_dbi'
>>>> pci-keystone.c:(.text+0x4f0): relocation truncated to fit: R_AARCH64_CALL26 against undefined symbol `__dw_pcie_write_dbi'
>>>>
>>>> while CONFIG_PCI_KEYSTONE is selected but CONFIG_PCIE_DW
>>>> is not set, the building failed like this. This patch
>>>> selects PCIE_DW to fix it.
>>>>
>>>> Reported-by: Hulk Robot <hulkci@huawei.com>
>>>> Fixes: 5709114f0a97 ("PCI: keystone: Add support for PCIe EP in AM654x Platforms")
>>>> Signed-off-by: YueHaibing <yuehaibing@huawei.com>
>>>> ---
>>>>  drivers/pci/controller/dwc/Kconfig | 1 +
>>>>  1 file changed, 1 insertion(+)
>>>>
>>>> diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
>>>> index b450ad2..641fa0f 100644
>>>> --- a/drivers/pci/controller/dwc/Kconfig
>>>> +++ b/drivers/pci/controller/dwc/Kconfig
>>>> @@ -105,6 +105,7 @@ config PCIE_SPEAR13XX
>>>>  config PCI_KEYSTONE
>>>>  	bool "TI Keystone PCIe controller"
>>>>  	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
>>>> +	select PCIE_DW
>>>
>>> What version are you building?  In v5.0, PCI_KEYSTONE already selects
>>> PCIE_DW_HOST:
>>>
>>> $ git grep -A4 PCI_KEYSTONE v5.0:drivers/pci/controller/dwc/Kconfig | cat
>>> v5.0:drivers/pci/controller/dwc/Kconfig:config PCI_KEYSTONE
>>> v5.0:drivers/pci/controller/dwc/Kconfig-	bool "TI Keystone PCIe controller"
>>> v5.0:drivers/pci/controller/dwc/Kconfig-	depends on ARCH_KEYSTONE || (ARM && COMPILE_TEST)
>>> v5.0:drivers/pci/controller/dwc/Kconfig-	depends on PCI_MSI_IRQ_DOMAIN
>>> v5.0:drivers/pci/controller/dwc/Kconfig-	select PCIE_DW_HOST
>>> 08:30:42 ~/history (master)$
>>
>> This patch based on linux-next:
>>
>> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=5709114f0a97
> 
> Oh, yep, looks like this was broken by ad5ca801bd7e ("PCI: keystone:
> Add support for PCIe EP in AM654x Platforms"), which added
> PCI_KEYSTONE_HOST and PCI_KEYSTONE_EP.  Those select PCIE_DW_HOST and
> PCIE_DW_EP, respectively, which in turn select PCIE_DW.
> 
> But I guess it's possible to enable PCI_KEYSTONE by itself without
> either PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP.  I'm not sure what that
> would mean, but we would still try to build pci-keystone.o
> 
> I'm hoping we can amend that commit before the merge window.

Sometime back Niklas had fixed this for DRA7xx in

commit b052835c63857e13d9ada3ebc57a8f9e1d124f3a
Author: Niklas Cassel <niklas.cassel@axis.com>
Date:   Wed Dec 20 00:29:28 2017 +0100

    PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode

    Refactor the Kconfig and Makefile handling for host/ep mode, since
    the previous handling was a bit unorthodox and would have been a bit
    bloated once more DWC based controllers added support for ep mode.

    Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
    Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
    Acked-by: Kishon Vijay Abraham I <kishon@ti.com>

Something similar is applicable for Keystone too as you mentioned without
selecting PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP, compiling pci-keystone.c
doesn't make sense.

Please see if below looks okay to you. This can be merged with "PCI:
keystone:Add support for PCIe EP in AM654x Platforms"). Let me know if I have
to send it separately with Fixes tag.

8<---------------------------------------------------------
From 8fba36048112cf72c49996fc47fd808534bf9689 Mon Sep 17 00:00:00 2001
From: Kishon Vijay Abraham I <kishon@ti.com>
Date: Mon, 22 Apr 2019 11:42:32 +0530
Subject: [PATCH] PCI: keystone: Refactor Kconfig for RC/EP mode

Do not allow PCI_KEYSTONE to be visible to user and let user visible
CONFIG symbols PCI_KEYSTONE_HOST and PCI_KEYSTONE_EP select
PCI_KEYSTONE. This will let pci-keystone.c to be compiled only when
either PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP is selected.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/pci/controller/dwc/Kconfig | 24 +++++++++++-------------
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/pci/controller/dwc/Kconfig
b/drivers/pci/controller/dwc/Kconfig
index b450ad2823a5..90618233d15b 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -103,34 +103,32 @@ config PCIE_SPEAR13XX
 	  Say Y here if you want PCIe support on SPEAr13XX SoCs.

 config PCI_KEYSTONE
-	bool "TI Keystone PCIe controller"
-	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
-	help
-	  Say Y here if you want to enable PCI controller support on Keystone
-	  SoCs. The PCI controller on Keystone is based on DesignWare hardware
-	  and therefore the driver re-uses the DesignWare core functions to
-	  implement the driver.
-
-if PCI_KEYSTONE
+	bool

 config PCI_KEYSTONE_HOST
 	bool "PCI Keystone Host Mode"
+	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
 	depends on PCI_MSI_IRQ_DOMAIN
 	select PCIE_DW_HOST
+	select PCI_KEYSTONE
 	default y
 	help
 	 Enables support for the PCIe controller in the Keystone SoC to work in
-	 host mode.
+	 host mode. The PCI controller on Keystone is based on DesignWare hardware
+	 and therefore the driver re-uses the DesignWare core functions to
+	 implement the driver.

 config PCI_KEYSTONE_EP
 	bool "PCI Keystone Endpoint Mode"
+	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
 	depends on PCI_ENDPOINT
 	select PCIE_DW_EP
+	select PCI_KEYSTONE
 	help
 	 Enables support for the PCIe controller in the Keystone SoC to work in
-	 endpoint mode.
-
-endif
+	 endpoint mode. The PCI controller on Keystone is based on DesignWare hardware
+	 and therefore the driver re-uses the DesignWare core functions to
+	 implement the driver.

 config PCI_LAYERSCAPE
 	bool "Freescale Layerscape PCIe controller"
-- 
2.17.1

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
  2019-04-22  7:49       ` Kishon Vijay Abraham I
@ 2019-04-22 13:26         ` Bjorn Helgaas
  2019-04-23  9:43           ` Lorenzo Pieralisi
  0 siblings, 1 reply; 7+ messages in thread
From: Bjorn Helgaas @ 2019-04-22 13:26 UTC (permalink / raw)
  To: Kishon Vijay Abraham I
  Cc: YueHaibing, lorenzo.pieralisi, robh, l.stach, andrew.smirnov,
	linux-kernel, linux-pci

On Mon, Apr 22, 2019 at 01:19:53PM +0530, Kishon Vijay Abraham I wrote:
> Hi Bjorn,
> ...

> Sometime back Niklas had fixed this for DRA7xx in
> 
> commit b052835c63857e13d9ada3ebc57a8f9e1d124f3a
> Author: Niklas Cassel <niklas.cassel@axis.com>
> Date:   Wed Dec 20 00:29:28 2017 +0100
> 
>     PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode
> 
>     Refactor the Kconfig and Makefile handling for host/ep mode, since
>     the previous handling was a bit unorthodox and would have been a bit
>     bloated once more DWC based controllers added support for ep mode.
> 
>     Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
>     Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>     Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> 
> Something similar is applicable for Keystone too as you mentioned without
> selecting PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP, compiling pci-keystone.c
> doesn't make sense.
> 
> Please see if below looks okay to you. This can be merged with "PCI:
> keystone:Add support for PCIe EP in AM654x Platforms"). Let me know if I have
> to send it separately with Fixes tag.

Lorenzo merged that commit, so I assume he'll take care of this.

> 8<---------------------------------------------------------
> From 8fba36048112cf72c49996fc47fd808534bf9689 Mon Sep 17 00:00:00 2001
> From: Kishon Vijay Abraham I <kishon@ti.com>
> Date: Mon, 22 Apr 2019 11:42:32 +0530
> Subject: [PATCH] PCI: keystone: Refactor Kconfig for RC/EP mode
> 
> Do not allow PCI_KEYSTONE to be visible to user and let user visible
> CONFIG symbols PCI_KEYSTONE_HOST and PCI_KEYSTONE_EP select
> PCI_KEYSTONE. This will let pci-keystone.c to be compiled only when
> either PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP is selected.
> 
> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> ---
>  drivers/pci/controller/dwc/Kconfig | 24 +++++++++++-------------
>  1 file changed, 11 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/Kconfig
> b/drivers/pci/controller/dwc/Kconfig
> index b450ad2823a5..90618233d15b 100644
> --- a/drivers/pci/controller/dwc/Kconfig
> +++ b/drivers/pci/controller/dwc/Kconfig
> @@ -103,34 +103,32 @@ config PCIE_SPEAR13XX
>  	  Say Y here if you want PCIe support on SPEAr13XX SoCs.
> 
>  config PCI_KEYSTONE
> -	bool "TI Keystone PCIe controller"
> -	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
> -	help
> -	  Say Y here if you want to enable PCI controller support on Keystone
> -	  SoCs. The PCI controller on Keystone is based on DesignWare hardware
> -	  and therefore the driver re-uses the DesignWare core functions to
> -	  implement the driver.
> -
> -if PCI_KEYSTONE
> +	bool
> 
>  config PCI_KEYSTONE_HOST
>  	bool "PCI Keystone Host Mode"
> +	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
>  	depends on PCI_MSI_IRQ_DOMAIN
>  	select PCIE_DW_HOST
> +	select PCI_KEYSTONE
>  	default y
>  	help
>  	 Enables support for the PCIe controller in the Keystone SoC to work in
> -	 host mode.
> +	 host mode. The PCI controller on Keystone is based on DesignWare hardware
> +	 and therefore the driver re-uses the DesignWare core functions to
> +	 implement the driver.
> 
>  config PCI_KEYSTONE_EP
>  	bool "PCI Keystone Endpoint Mode"
> +	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
>  	depends on PCI_ENDPOINT
>  	select PCIE_DW_EP
> +	select PCI_KEYSTONE
>  	help
>  	 Enables support for the PCIe controller in the Keystone SoC to work in
> -	 endpoint mode.
> -
> -endif
> +	 endpoint mode. The PCI controller on Keystone is based on DesignWare hardware
> +	 and therefore the driver re-uses the DesignWare core functions to
> +	 implement the driver.
> 
>  config PCI_LAYERSCAPE
>  	bool "Freescale Layerscape PCIe controller"
> -- 
> 2.17.1

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set
  2019-04-22 13:26         ` Bjorn Helgaas
@ 2019-04-23  9:43           ` Lorenzo Pieralisi
  0 siblings, 0 replies; 7+ messages in thread
From: Lorenzo Pieralisi @ 2019-04-23  9:43 UTC (permalink / raw)
  To: Bjorn Helgaas
  Cc: Kishon Vijay Abraham I, YueHaibing, robh, l.stach,
	andrew.smirnov, linux-kernel, linux-pci

On Mon, Apr 22, 2019 at 08:26:17AM -0500, Bjorn Helgaas wrote:
> On Mon, Apr 22, 2019 at 01:19:53PM +0530, Kishon Vijay Abraham I wrote:
> > Hi Bjorn,
> > ...
> 
> > Sometime back Niklas had fixed this for DRA7xx in
> > 
> > commit b052835c63857e13d9ada3ebc57a8f9e1d124f3a
> > Author: Niklas Cassel <niklas.cassel@axis.com>
> > Date:   Wed Dec 20 00:29:28 2017 +0100
> > 
> >     PCI: dwc: dra7xx: Refactor Kconfig and Makefile handling for host/ep mode
> > 
> >     Refactor the Kconfig and Makefile handling for host/ep mode, since
> >     the previous handling was a bit unorthodox and would have been a bit
> >     bloated once more DWC based controllers added support for ep mode.
> > 
> >     Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
> >     Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> >     Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
> > 
> > Something similar is applicable for Keystone too as you mentioned without
> > selecting PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP, compiling pci-keystone.c
> > doesn't make sense.
> > 
> > Please see if below looks okay to you. This can be merged with "PCI:
> > keystone:Add support for PCIe EP in AM654x Platforms"). Let me know if I have
> > to send it separately with Fixes tag.
> 
> Lorenzo merged that commit, so I assume he'll take care of this.

I will squash it in and rebuild the branch, thanks.

Lorenzo

> > 8<---------------------------------------------------------
> > From 8fba36048112cf72c49996fc47fd808534bf9689 Mon Sep 17 00:00:00 2001
> > From: Kishon Vijay Abraham I <kishon@ti.com>
> > Date: Mon, 22 Apr 2019 11:42:32 +0530
> > Subject: [PATCH] PCI: keystone: Refactor Kconfig for RC/EP mode
> > 
> > Do not allow PCI_KEYSTONE to be visible to user and let user visible
> > CONFIG symbols PCI_KEYSTONE_HOST and PCI_KEYSTONE_EP select
> > PCI_KEYSTONE. This will let pci-keystone.c to be compiled only when
> > either PCI_KEYSTONE_HOST or PCI_KEYSTONE_EP is selected.
> > 
> > Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
> > ---
> >  drivers/pci/controller/dwc/Kconfig | 24 +++++++++++-------------
> >  1 file changed, 11 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/pci/controller/dwc/Kconfig
> > b/drivers/pci/controller/dwc/Kconfig
> > index b450ad2823a5..90618233d15b 100644
> > --- a/drivers/pci/controller/dwc/Kconfig
> > +++ b/drivers/pci/controller/dwc/Kconfig
> > @@ -103,34 +103,32 @@ config PCIE_SPEAR13XX
> >  	  Say Y here if you want PCIe support on SPEAr13XX SoCs.
> > 
> >  config PCI_KEYSTONE
> > -	bool "TI Keystone PCIe controller"
> > -	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
> > -	help
> > -	  Say Y here if you want to enable PCI controller support on Keystone
> > -	  SoCs. The PCI controller on Keystone is based on DesignWare hardware
> > -	  and therefore the driver re-uses the DesignWare core functions to
> > -	  implement the driver.
> > -
> > -if PCI_KEYSTONE
> > +	bool
> > 
> >  config PCI_KEYSTONE_HOST
> >  	bool "PCI Keystone Host Mode"
> > +	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
> >  	depends on PCI_MSI_IRQ_DOMAIN
> >  	select PCIE_DW_HOST
> > +	select PCI_KEYSTONE
> >  	default y
> >  	help
> >  	 Enables support for the PCIe controller in the Keystone SoC to work in
> > -	 host mode.
> > +	 host mode. The PCI controller on Keystone is based on DesignWare hardware
> > +	 and therefore the driver re-uses the DesignWare core functions to
> > +	 implement the driver.
> > 
> >  config PCI_KEYSTONE_EP
> >  	bool "PCI Keystone Endpoint Mode"
> > +	depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST)
> >  	depends on PCI_ENDPOINT
> >  	select PCIE_DW_EP
> > +	select PCI_KEYSTONE
> >  	help
> >  	 Enables support for the PCIe controller in the Keystone SoC to work in
> > -	 endpoint mode.
> > -
> > -endif
> > +	 endpoint mode. The PCI controller on Keystone is based on DesignWare hardware
> > +	 and therefore the driver re-uses the DesignWare core functions to
> > +	 implement the driver.
> > 
> >  config PCI_LAYERSCAPE
> >  	bool "Freescale Layerscape PCIe controller"
> > -- 
> > 2.17.1

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2019-04-23  9:43 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-04-19  2:58 [PATCH] PCI: keystone: Fix build error while only CONFIG_PCI_KEYSTONE is set Yue Haibing
2019-04-19 13:31 ` Bjorn Helgaas
2019-04-19 13:46   ` YueHaibing
2019-04-19 17:47     ` Bjorn Helgaas
2019-04-22  7:49       ` Kishon Vijay Abraham I
2019-04-22 13:26         ` Bjorn Helgaas
2019-04-23  9:43           ` Lorenzo Pieralisi

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