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From: Remi Pommarel <repk@triplefau.lt>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH] pci: aardvark: Wait for endpoint to be ready before training link
Date: Wed, 24 Apr 2019 00:29:18 +0200	[thread overview]
Message-ID: <20190423222917.GN2754@voidbox.localdomain> (raw)
In-Reply-To: <20190423163215.GB26523@red-moon>

Hi,

On Tue, Apr 23, 2019 at 05:32:15PM +0100, Lorenzo Pieralisi wrote:
> On Wed, Mar 13, 2019 at 10:37:52PM +0100, Remi Pommarel wrote:
> > When configuring pcie reset pin from gpio (e.g. initially set by
> > u-boot) to pcie function this pin goes low for a brief moment
> > asserting the PERST# signal. Thus connected device enters fundamental
> > reset process and link configuration can only begin after a minimal
> > 100ms delay (see [1]).
> > 
> > This makes sure that link is configured after at least 100ms from
> > beginning of probe() callback (shortly after the reset pin function
> > configuration switch through pinctrl subsytem).
> > 
> > [1] "PCI Express Base Specification", REV. 2.1
> >         PCI Express, March 4 2009, 6.6.1 Conventional Reset
> > 
> > Signed-off-by: Remi Pommarel <repk@triplefau.lt>
> > ---
> >  drivers/pci/controller/pci-aardvark.c | 17 ++++++++++++++---
> >  1 file changed, 14 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> > index a30ae7cf8e7e..70a1023d0ef1 100644
> > --- a/drivers/pci/controller/pci-aardvark.c
> > +++ b/drivers/pci/controller/pci-aardvark.c
> > @@ -177,6 +177,9 @@
> >  
> >  #define PIO_TIMEOUT_MS			1
> >  
> > +/* Endpoint can take up to 100ms to be ready after a reset */
> > +#define ENDPOINT_RST_MS			100
> > +
> >  #define LINK_WAIT_MAX_RETRIES		10
> >  #define LINK_WAIT_USLEEP_MIN		90000
> >  #define LINK_WAIT_USLEEP_MAX		100000
> > @@ -242,8 +245,10 @@ static int advk_pcie_wait_for_link(struct advk_pcie *pcie)
> >  	return -ETIMEDOUT;
> >  }
> >  
> > -static void advk_pcie_setup_hw(struct advk_pcie *pcie)
> > +static void
> > +advk_pcie_setup_hw(struct advk_pcie *pcie, unsigned long ep_rdy_time)
> 
> Nit: I prefer the prototype to be in one line, I wrap it for you.
> 
> I am wondering why you need to pass in ep_rdy_time parameter when you
> can easily compute it in the function itself.
> 

The only reason for that is because the sooner I get the jiffies the
lower the delay has to be. I was trying to reduce the impact of this
delay to a minimum, but maybe the improvement is not worth it.

-- 
Remi

  reply	other threads:[~2019-04-23 22:20 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-13 21:37 [PATCH] pci: aardvark: Wait for endpoint to be ready before training link Remi Pommarel
2019-04-23 16:32 ` Lorenzo Pieralisi
2019-04-23 22:29   ` Remi Pommarel [this message]
2019-04-24 16:50     ` Lorenzo Pieralisi
2019-04-25 21:08       ` Remi Pommarel
2019-04-26 16:10         ` Bjorn Helgaas
2019-04-26 17:16           ` Lorenzo Pieralisi
2019-04-25 16:30 ` Bjorn Helgaas

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