From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Remi Pommarel <repk@triplefau.lt>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Ellie Reeves <ellierevves@gmail.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH] PCI: aardvark: Fix PCI_EXP_RTCTL conf register writing
Date: Thu, 13 Jun 2019 17:14:41 +0100 [thread overview]
Message-ID: <20190613161441.GA2247@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <20190522213351.21366-1-repk@triplefau.lt>
On Wed, May 22, 2019 at 11:33:49PM +0200, Remi Pommarel wrote:
> PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
> should not modify other interrupts' mask (such as ISR0).
>
> Fixes: 6302bf3ef78d ("PCI: Init PCIe feature bits for managed host bridge alloc")
> Signed-off-by: Remi Pommarel <repk@triplefau.lt>
> ---
> Please note that I will unlikely be able to answer any comments from May
> 24th to June 10th.
> ---
> drivers/pci/controller/pci-aardvark.c | 10 +++++++---
> 1 file changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c
> index 134e0306ff00..27102d3b4f9c 100644
> --- a/drivers/pci/controller/pci-aardvark.c
> +++ b/drivers/pci/controller/pci-aardvark.c
> @@ -451,10 +451,14 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
> advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg);
> break;
>
> - case PCI_EXP_RTCTL:
> - new = (new & PCI_EXP_RTCTL_PMEIE) << 3;
> - advk_writel(pcie, new, PCIE_ISR0_MASK_REG);
> + case PCI_EXP_RTCTL: {
> + /* Only mask/unmask PME interrupt */
> + u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &
> + ~PCIE_MSG_PM_PME_MASK;
> + val |= (new & PCI_EXP_RTCTL_PMEIE) << 3;
I know you have not introduced this code but maybe we can
take an opportunity to clarify it (that << 3 shift obfuscates
a bit):
u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) &
~PCIE_MSG_PM_PME_MASK;
if (new & PCI_EXP_RTCTL_PMEIE)
val |= PCIE_MSG_PM_PME_MASK;
advk_writel(pcie, val, PCIE_ISR0_MASK_REG);
break;
Or I am not reading the code correctly ?
Regardless, I need Thomas' ACK to proceed.
Lorenzo
> + advk_writel(pcie, val, PCIE_ISR0_MASK_REG);
> break;
> + }
>
> case PCI_EXP_RTSTA:
> new = (new & PCI_EXP_RTSTA_PME) >> 9;
> --
> 2.20.1
>
next prev parent reply other threads:[~2019-06-13 16:14 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-22 21:33 [PATCH] PCI: aardvark: Fix PCI_EXP_RTCTL conf register writing Remi Pommarel
2019-06-13 16:14 ` Lorenzo Pieralisi [this message]
2019-06-13 22:06 ` Remi Pommarel
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