From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] PCI: armada8k: Add PHYs support
Date: Sun, 16 Jun 2019 10:00:17 +0200 [thread overview]
Message-ID: <20190616100017.607e4848@windsurf> (raw)
In-Reply-To: <20190401131239.17008-1-miquel.raynal@bootlin.com>
Hello,
On Mon, 1 Apr 2019 15:12:39 +0200
Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Bring PHY support for the Armada8k driver.
>
> The Armada8k IP only supports x1, x2 or x4 link widths. Iterate over
> the DT 'phys' entries and configure them one by one. Use
> phy_set_mode_ext() to make use of the submode parameter (initially
> introduced for Ethernet modes). For PCI configuration, let the submode
> be the width (1, 2, 4, etc) so that the PHY driver knows how many
> lanes are bundled. Do not error out in case of error for compatibility
> reasons.
>
> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2019-06-16 8:00 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-01 13:12 [PATCH] PCI: armada8k: Add PHYs support Miquel Raynal
2019-06-11 16:03 ` Lorenzo Pieralisi
2019-06-16 8:00 ` Thomas Petazzoni [this message]
2019-06-17 11:18 ` Lorenzo Pieralisi
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