From: Manikanta Maddireddy <mmaddireddy@nvidia.com> To: <thierry.reding@gmail.com>, <bhelgaas@google.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <jonathanh@nvidia.com>, <lorenzo.pieralisi@arm.com>, <vidyas@nvidia.com> Cc: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, Manikanta Maddireddy <mmaddireddy@nvidia.com> Subject: [PATCH V5 02/27] PCI: tegra: Handle failure cases in tegra_pcie_power_on() Date: Mon, 17 Jun 2019 23:09:27 +0530 Message-ID: <20190617173952.29363-3-mmaddireddy@nvidia.com> (raw) In-Reply-To: <20190617173952.29363-1-mmaddireddy@nvidia.com> Unroll the PCIe power on sequence if any one of the steps fail in tegra_pcie_power_on(). Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> --- V5: No change V4: No change V3: No change V2: New patch to handle error cleanup in tegra_pcie_power_on(). drivers/pci/controller/pci-tegra.c | 26 +++++++++++++++++++++----- 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c index f4f53d092e00..8235d937951b 100644 --- a/drivers/pci/controller/pci-tegra.c +++ b/drivers/pci/controller/pci-tegra.c @@ -1052,7 +1052,7 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie) err = clk_prepare_enable(pcie->pex_clk); if (err) { dev_err(dev, "failed to enable PEX clock: %d\n", err); - return err; + goto regulator_disable; } reset_control_deassert(pcie->pex_rst); } else { @@ -1061,7 +1061,7 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie) pcie->pex_rst); if (err) { dev_err(dev, "powerup sequence failed: %d\n", err); - return err; + goto regulator_disable; } } @@ -1070,24 +1070,40 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie) err = clk_prepare_enable(pcie->afi_clk); if (err < 0) { dev_err(dev, "failed to enable AFI clock: %d\n", err); - return err; + goto powergate; } if (soc->has_cml_clk) { err = clk_prepare_enable(pcie->cml_clk); if (err < 0) { dev_err(dev, "failed to enable CML clock: %d\n", err); - return err; + goto disable_afi_clk; } } err = clk_prepare_enable(pcie->pll_e); if (err < 0) { dev_err(dev, "failed to enable PLLE clock: %d\n", err); - return err; + goto disable_cml_clk; } return 0; + +disable_cml_clk: + if (soc->has_cml_clk) + clk_disable_unprepare(pcie->cml_clk); +disable_afi_clk: + clk_disable_unprepare(pcie->afi_clk); +powergate: + reset_control_assert(pcie->afi_rst); + reset_control_assert(pcie->pex_rst); + clk_disable_unprepare(pcie->pex_clk); + if (!dev->pm_domain) + tegra_powergate_power_off(TEGRA_POWERGATE_PCIE); +regulator_disable: + regulator_bulk_disable(pcie->num_supplies, pcie->supplies); + + return err; } static int tegra_pcie_clocks_get(struct tegra_pcie *pcie) -- 2.17.1
next prev parent reply index Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-06-17 17:39 [PATCH V5 00/27] Enable Tegra PCIe root port features Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 01/27] soc/tegra: pmc: Export tegra_powergate_power_on() Manikanta Maddireddy 2019-06-17 17:39 ` Manikanta Maddireddy [this message] 2019-06-17 17:39 ` [PATCH V5 03/27] PCI: tegra: Rearrange Tegra PCIe driver functions Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 04/27] PCI: tegra: Mask AFI_INTR in runtime suspend Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 05/27] PCI: tegra: Fix PCIe host power up sequence Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 06/27] PCI: tegra: Add PCIe Gen2 link speed support Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 07/27] PCI: tegra: Advertise PCIe Advanced Error Reporting (AER) capability Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 08/27] PCI: tegra: Program UPHY electrical settings for Tegra210 Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 09/27] PCI: tegra: Enable opportunistic UpdateFC and ACK Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 10/27] PCI: tegra: Disable AFI dynamic clock gating Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 11/27] PCI: tegra: Process pending DLL transactions before entering L1 or L2 Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 12/27] PCI: tegra: Enable PCIe xclk clock clamping Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 13/27] PCI: tegra: Increase the deskew retry time Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 14/27] PCI: tegra: Add SW fixup for RAW violations Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 15/27] PCI: tegra: Update flow control timer frequency in Tegra210 Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 16/27] PCI: tegra: Set target speed as Gen1 before starting LTSSM Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 17/27] PCI: tegra: Fix PLLE power down issue due to CLKREQ# signal Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 18/27] PCI: tegra: Program AFI_CACHE* registers only for Tegra20 Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 19/27] PCI: tegra: Change PRSNT_SENSE IRQ log to debug Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 20/27] PCI: tegra: Use legacy IRQ for port service drivers Manikanta Maddireddy 2019-06-18 5:47 ` Manikanta Maddireddy 2019-06-18 13:35 ` Lorenzo Pieralisi 2019-06-17 17:39 ` [PATCH V5 21/27] PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of soc struct Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 22/27] dt-bindings: pci: tegra: Document PCIe DPD pinctrl optional prop Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 23/27] arm64: tegra: Add PEX DPD states as pinctrl properties Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 24/27] PCI: tegra: Put PEX CLK & BIAS pads in DPD mode Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 25/27] PCI: Add DT binding for "reset-gpios" property Manikanta Maddireddy 2019-06-17 17:39 ` [PATCH V5 26/27] PCI: tegra: Add support for GPIO based PERST# Manikanta Maddireddy 2019-06-18 10:51 ` Thierry Reding 2019-06-17 17:39 ` [PATCH V5 27/27] PCI: tegra: Change link retry log level to debug Manikanta Maddireddy
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