linux-pci.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Chris Packham <Chris.Packham@alliedtelesis.co.nz>
Cc: Jason Cooper <jason@lakedaemon.net>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: Kirkwood PCI Express and bridges
Date: Fri, 21 Jun 2019 07:33:18 +0200	[thread overview]
Message-ID: <20190621073318.3bcd940e@windsurf> (raw)
In-Reply-To: <403548ec3a7543b08ca32e47a1465e70@svr-chch-ex1.atlnz.lc>

Hello Chris,

On Fri, 21 Jun 2019 04:03:27 +0000
Chris Packham <Chris.Packham@alliedtelesis.co.nz> wrote:

> I'm in the process of updating the kernel version used on our products 
> from 4.4 -> 5.1.
> 
> We have one product that uses a Kirkwood CPU, IDT PCI bridge and Marvell 
> Switch ASIC. The Switch ASIC presents as multiple PCI devices.
> 
> The hardware setup looks like this
>                                         __________
> [ Kirkwood ] --- [ IDT 5T5 ] ---+---  |          |
>                                  +---  |  Switch  |
>                                  +---  |          |
>                                  +---  |__________|
> 
> On the 4.4 based kernel things are fine
> 
> [root@awplus flash]# lspci -t
> -[0000:00]---01.0-[01-06]----00.0-[02-06]--+-02.0-[03]----00.0
>                                             +-03.0-[04]----00.0
>                                             +-04.0-[05]----00.0
>                                             \-05.0-[06]----00.0
> 
> But on the 5.1 based kernel things get a little weird
> 
> [root@awplus flash]# lspci -t
> -[0000:00]---01.0-[01-06]--+-00.0-[02-06]--
>                             +-01.0
>                             +-02.0-[02-06]--
>                             +-03.0-[02-06]--
>                             +-04.0-[02-06]--
>                             +-05.0-[02-06]--
>                             +-06.0-[02-06]--
>                             +-07.0-[02-06]--
>                             +-08.0-[02-06]--
>                             +-09.0-[02-06]--
>                             +-0a.0-[02-06]--
>                             +-0b.0-[02-06]--
>                             +-0c.0-[02-06]--
>                             +-0d.0-[02-06]--
>                             +-0e.0-[02-06]--
>                             +-0f.0-[02-06]--
>                             +-10.0-[02-06]--
>                             +-11.0-[02-06]--
>                             +-12.0-[02-06]--
>                             +-13.0-[02-06]--
>                             +-14.0-[02-06]--
>                             +-15.0-[02-06]--
>                             +-16.0-[02-06]--
>                             +-17.0-[02-06]--
>                             +-18.0-[02-06]--
>                             +-19.0-[02-06]--
>                             +-1a.0-[02-06]--
>                             +-1b.0-[02-06]--
>                             +-1c.0-[02-06]--
>                             +-1d.0-[02-06]--
>                             +-1e.0-[02-06]--
>                             \-1f.0-[02-06]--+-02.0-[03]----00.0
>                                             +-03.0-[04]----00.0
>                                             +-04.0-[05]----00.0
>                                             \-05.0-[06]----00.0
> 
> 
> I'll start bisecting to see where things started going wrong. I just 
> wondered if this rings any bells for anyone.

I am almost sure that the culprit is
1f08673eef1236f7d02d93fcf596bb8531ef0d12 ("PCI: mvebu: Convert to PCI
emulated bridge config space").

I still think it makes sense to share the bridge emulation code between
the mvebu and aardvark drivers, but this sharing has required making
the code very different, with lots of subtle differences in behavior in
how registers are emulated.

Unfortunately, I don't have access to one of these complicated PCI
setup with a HW switch on the way, so I couldn't test this kind of
setups.

Do you mind helping with figuring out what the issues are ? That would
be really nice.

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com

  reply	other threads:[~2019-06-21  5:33 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-21  4:03 Kirkwood PCI Express and bridges Chris Packham
2019-06-21  5:33 ` Thomas Petazzoni [this message]
2019-06-24  4:08   ` Chris Packham
2019-06-25  2:05     ` Chris Packham

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190621073318.3bcd940e@windsurf \
    --to=thomas.petazzoni@bootlin.com \
    --cc=Chris.Packham@alliedtelesis.co.nz \
    --cc=bhelgaas@google.com \
    --cc=jason@lakedaemon.net \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).