From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BFC3C5B57A for ; Fri, 28 Jun 2019 17:05:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EF293208C4 for ; Fri, 28 Jun 2019 17:05:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726531AbfF1RF5 (ORCPT ); Fri, 28 Jun 2019 13:05:57 -0400 Received: from foss.arm.com ([217.140.110.172]:52080 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726056AbfF1RF5 (ORCPT ); Fri, 28 Jun 2019 13:05:57 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id BF6F928; Fri, 28 Jun 2019 10:05:56 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (unknown [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BC1AB3F706; Fri, 28 Jun 2019 10:05:54 -0700 (PDT) Date: Fri, 28 Jun 2019 18:05:52 +0100 From: Lorenzo Pieralisi To: "Z.q. Hou" Cc: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "catalin.marinas@arm.com" , "will.deacon@arm.com" , Mingkai Hu , "M.h. Lian" , Xiaowei Bao Subject: Re: [PATCHv5 10/20] PCI: mobiveil: Fix the INTx process errors Message-ID: <20190628170552.GD21829@e121166-lin.cambridge.arm.com> References: <20190412083635.33626-1-Zhiqiang.Hou@nxp.com> <20190412083635.33626-11-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190412083635.33626-11-Zhiqiang.Hou@nxp.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On Fri, Apr 12, 2019 at 08:36:12AM +0000, Z.q. Hou wrote: > From: Hou Zhiqiang > > In the loop block, there is not code to update the loop key, > this patch updates the loop key by re-read the INTx status > register. > > This patch also add the clearing of the handled INTx status. This is two bugs and that requires two patches, each of them fixing a specific issue. So split the patch into two and repost it. Lorenzo > Note: Need MV to test this fix. > > Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver") > Signed-off-by: Hou Zhiqiang > Reviewed-by: Minghuan Lian > Reviewed-by: Subrahmanya Lingappa > --- > V5: > - Corrected and retouched the subject and changelog. > > drivers/pci/controller/pcie-mobiveil.c | 13 +++++++++---- > 1 file changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/pci/controller/pcie-mobiveil.c b/drivers/pci/controller/pcie-mobiveil.c > index 4ba458474e42..78e575e71f4d 100644 > --- a/drivers/pci/controller/pcie-mobiveil.c > +++ b/drivers/pci/controller/pcie-mobiveil.c > @@ -361,6 +361,7 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) > /* Handle INTx */ > if (intr_status & PAB_INTP_INTX_MASK) { > shifted_status = csr_readl(pcie, PAB_INTP_AMBA_MISC_STAT); > + shifted_status &= PAB_INTP_INTX_MASK; > shifted_status >>= PAB_INTX_START; > do { > for_each_set_bit(bit, &shifted_status, PCI_NUM_INTX) { > @@ -372,12 +373,16 @@ static void mobiveil_pcie_isr(struct irq_desc *desc) > dev_err_ratelimited(dev, "unexpected IRQ, INT%d\n", > bit); > > - /* clear interrupt */ > - csr_writel(pcie, > - shifted_status << PAB_INTX_START, > + /* clear interrupt handled */ > + csr_writel(pcie, 1 << (PAB_INTX_START + bit), > PAB_INTP_AMBA_MISC_STAT); > } > - } while ((shifted_status >> PAB_INTX_START) != 0); > + > + shifted_status = csr_readl(pcie, > + PAB_INTP_AMBA_MISC_STAT); > + shifted_status &= PAB_INTP_INTX_MASK; > + shifted_status >>= PAB_INTX_START; > + } while (shifted_status != 0); > } > > /* read extra MSI status register */ > -- > 2.17.1 >