From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> To: Bjorn Helgaas <helgaas@kernel.org> Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, ashok.raj@intel.com, keith.busch@intel.com Subject: Re: [PATCH v5 5/7] PCI/ATS: Add PASID support for PCIe VF devices Date: Tue, 13 Aug 2019 15:19:58 -0700 Message-ID: <20190813221958.GA139211@skuppusw-desk.amr.corp.intel.com> (raw) In-Reply-To: <20190812200508.GM11785@google.com> On Mon, Aug 12, 2019 at 03:05:08PM -0500, Bjorn Helgaas wrote: > On Thu, Aug 01, 2019 at 05:06:02PM -0700, sathyanarayanan.kuppuswamy@linux.intel.com wrote: > > From: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > > > > When IOMMU tries to enable PASID for VF device in > > iommu_enable_dev_iotlb(), it always fails because PASID support for PCIe > > VF device is currently broken in PCIE driver. Current implementation > > expects the given PCIe device (PF & VF) to implement PASID capability > > before enabling the PASID support. But this assumption is incorrect. As > > per PCIe spec r4.0, sec 9.3.7.14, all VFs associated with PF can only > > use the PASID of the PF and not implement it. > > > > Also, since PASID is a shared resource between PF/VF, following rules > > should apply. > > > > 1. Use proper locking before accessing/modifying PF resources in VF > > PASID enable/disable call. > > 2. Use reference count logic to track the usage of PASID resource. > > 3. Disable PASID only if the PASID reference count (pasid_ref_cnt) is zero. > > > > Cc: Ashok Raj <ashok.raj@intel.com> > > Cc: Keith Busch <keith.busch@intel.com> > > Suggested-by: Ashok Raj <ashok.raj@intel.com> > > Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> > > --- > > drivers/pci/ats.c | 113 ++++++++++++++++++++++++++++++++++---------- > > include/linux/pci.h | 2 + > > 2 files changed, 90 insertions(+), 25 deletions(-) > > > > diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c > > index 079dc5444444..9384afd7d00e 100644 > > --- a/drivers/pci/ats.c > > +++ b/drivers/pci/ats.c > > @@ -402,6 +402,8 @@ void pci_pasid_init(struct pci_dev *pdev) > > if (pdev->is_virtfn) > > return; > > > > + mutex_init(&pdev->pasid_lock); > > + > > pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); > > if (!pos) > > return; > > @@ -436,32 +438,57 @@ void pci_pasid_init(struct pci_dev *pdev) > > int pci_enable_pasid(struct pci_dev *pdev, int features) > > { > > u16 control, supported; > > + int ret = 0; > > + struct pci_dev *pf = pci_physfn(pdev); > > > > - if (WARN_ON(pdev->pasid_enabled)) > > - return -EBUSY; > > + mutex_lock(&pf->pasid_lock); > > > > - if (!pdev->eetlp_prefix_path) > > - return -EINVAL; > > + if (WARN_ON(pdev->pasid_enabled)) { > > + ret = -EBUSY; > > + goto pasid_unlock; > > + } > > > > - if (!pdev->pasid_cap) > > - return -EINVAL; > > + if (!pdev->eetlp_prefix_path) { > > + ret = -EINVAL; > > + goto pasid_unlock; > > + } > > > > - pci_read_config_word(pdev, pdev->pasid_cap + PCI_PASID_CAP, > > - &supported); > > + if (!pf->pasid_cap) { > > + ret = -EINVAL; > > + goto pasid_unlock; > > + } > > + > > + if (pdev->is_virtfn && pf->pasid_enabled) > > + goto update_status; > > + > > + pci_read_config_word(pf, pf->pasid_cap + PCI_PASID_CAP, &supported); > > supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; > > > > /* User wants to enable anything unsupported? */ > > - if ((supported & features) != features) > > - return -EINVAL; > > + if ((supported & features) != features) { > > + ret = -EINVAL; > > + goto pasid_unlock; > > + } > > > > control = PCI_PASID_CTRL_ENABLE | features; > > - pdev->pasid_features = features; > > - > > + pf->pasid_features = features; > > pci_write_config_word(pdev, pdev->pasid_cap + PCI_PASID_CTRL, control); > > > > - pdev->pasid_enabled = 1; > > + /* > > + * If PASID is not already enabled in PF, increment pasid_ref_cnt > > + * to count PF PASID usage. > > + */ > > + if (pdev->is_virtfn && !pf->pasid_enabled) { > > + atomic_inc(&pf->pasid_ref_cnt); > > + pf->pasid_enabled = 1; > > + } > > > > - return 0; > > +update_status: > > + atomic_inc(&pf->pasid_ref_cnt); > > + pdev->pasid_enabled = 1; > > +pasid_unlock: > > + mutex_unlock(&pf->pasid_lock); > > + return ret; > > } > > EXPORT_SYMBOL_GPL(pci_enable_pasid); > > > > @@ -472,16 +499,29 @@ EXPORT_SYMBOL_GPL(pci_enable_pasid); > > void pci_disable_pasid(struct pci_dev *pdev) > > { > > u16 control = 0; > > + struct pci_dev *pf = pci_physfn(pdev); > > + > > + mutex_lock(&pf->pasid_lock); > > > > if (WARN_ON(!pdev->pasid_enabled)) > > - return; > > + goto pasid_unlock; > > > > - if (!pdev->pasid_cap) > > - return; > > + if (!pf->pasid_cap) > > + goto pasid_unlock; > > > > - pci_write_config_word(pdev, pdev->pasid_cap + PCI_PASID_CTRL, control); > > + atomic_dec(&pf->pasid_ref_cnt); > > > > + if (atomic_read(&pf->pasid_ref_cnt)) > > + goto done; > > + > > + /* Disable PASID only if pasid_ref_cnt is zero */ > > + pci_write_config_word(pf, pf->pasid_cap + PCI_PASID_CTRL, control); > > + > > +done: > > pdev->pasid_enabled = 0; > > +pasid_unlock: > > + mutex_unlock(&pf->pasid_lock); > > + > > } > > EXPORT_SYMBOL_GPL(pci_disable_pasid); > > > > @@ -492,15 +532,25 @@ EXPORT_SYMBOL_GPL(pci_disable_pasid); > > void pci_restore_pasid_state(struct pci_dev *pdev) > > { > > u16 control; > > + struct pci_dev *pf = pci_physfn(pdev); > > > > if (!pdev->pasid_enabled) > > return; > > > > - if (!pdev->pasid_cap) > > + if (!pf->pasid_cap) > > return; > > > > + mutex_lock(&pf->pasid_lock); > > + > > + pci_read_config_word(pf, pf->pasid_cap + PCI_PASID_CTRL, &control); > > + if (control & PCI_PASID_CTRL_ENABLE) > > + goto pasid_unlock; > > + > > control = PCI_PASID_CTRL_ENABLE | pdev->pasid_features; > > - pci_write_config_word(pdev, pdev->pasid_cap + PCI_PASID_CTRL, control); > > + pci_write_config_word(pf, pf->pasid_cap + PCI_PASID_CTRL, control); > > + > > +pasid_unlock: > > + mutex_unlock(&pf->pasid_lock); > > } > > EXPORT_SYMBOL_GPL(pci_restore_pasid_state); > > > > @@ -517,15 +567,22 @@ EXPORT_SYMBOL_GPL(pci_restore_pasid_state); > > int pci_pasid_features(struct pci_dev *pdev) > > { > > u16 supported; > > + struct pci_dev *pf = pci_physfn(pdev); > > + > > + mutex_lock(&pf->pasid_lock); > > > > - if (!pdev->pasid_cap) > > + if (!pf->pasid_cap) { > > + mutex_unlock(&pf->pasid_lock); > > return -EINVAL; > > + } > > > > - pci_read_config_word(pdev, pdev->pasid_cap + PCI_PASID_CAP, > > + pci_read_config_word(pf, pf->pasid_cap + PCI_PASID_CAP, > > &supported); > > > > supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; > > > > + mutex_unlock(&pf->pasid_lock); > > + > > return supported; > > } > > EXPORT_SYMBOL_GPL(pci_pasid_features); > > @@ -579,15 +636,21 @@ EXPORT_SYMBOL_GPL(pci_prg_resp_pasid_required); > > int pci_max_pasids(struct pci_dev *pdev) > > { > > u16 supported; > > + struct pci_dev *pf = pci_physfn(pdev); > > + > > + mutex_lock(&pf->pasid_lock); > > > > - if (!pdev->pasid_cap) > > + if (!pf->pasid_cap) { > > + mutex_unlock(&pf->pasid_lock); > > return -EINVAL; > > + } > > > > - pci_read_config_word(pdev, pdev->pasid_cap + PCI_PASID_CAP, > > - &supported); > > + pci_read_config_word(pf, pf->pasid_cap + PCI_PASID_CAP, &supported); > > > > supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT; > > > > + mutex_unlock(&pf->pasid_lock); > > + > > return (1 << supported); > > } > > EXPORT_SYMBOL_GPL(pci_max_pasids); > > diff --git a/include/linux/pci.h b/include/linux/pci.h > > index 3c9c4c82be27..4bfcca045afd 100644 > > --- a/include/linux/pci.h > > +++ b/include/linux/pci.h > > @@ -461,8 +461,10 @@ struct pci_dev { > > atomic_t pri_ref_cnt; /* Number of PF/VF PRI users */ > > #endif > > #ifdef CONFIG_PCI_PASID > > + struct mutex pasid_lock; /* PASID enable lock */ > > I think these locks are finer-grained than necessary. I'm not sure > it's worth having two mutexes for every device (one for PRI and > another for PASID). Is there really a performance benefit for having > two? Performance benefit should be minimal. But, PRI and PASID are functionally independent. So I don't think its correct to protect its resources with a common lock. Let me know your comments. > > Do it (or do they) need to be in struct pci_dev? You only use the PF > mutexes, so maybe it could be in the struct pci_sriov, which I think > is only one per PF. Its possible to move it to pci_sriov structure. But is that the right place for it? This lock is only used for protecting PRI and PASID feature updates and PRI/PASID are not dependent on IOV feature. Let me know your comments. If you want to move this lock to pci_sriov structure and use one lock for both PRI/PASID, then the implementation would look like following. We could create physfn lock/unlock functions in include/linux/pci.h similar to pci_physfn() function. #ifdef CONFIG_PCI_IOV static inline void pci_physfn_reslock(struct pci_dev *dev) { struct pci_dev *pf = pci_physfn(dev); if (!pf->is_physfn) return; mutex_lock(&pf->sriov->reslock); } #else static inline void pci_physfn_reslock(struct pci_dev *dev) {}; #endif > > > u16 pasid_cap; /* PASID Capability offset */ > > u16 pasid_features; > > + atomic_t pasid_ref_cnt; /* Number of VFs with PASID enabled */ > > #endif > > #ifdef CONFIG_PCI_P2PDMA > > struct pci_p2pdma *p2pdma; > > -- > > 2.21.0 > > -- Sathyanarayanan Kuppuswamy Linux kernel developer
next prev parent reply index Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-02 0:05 [PATCH v5 0/7] Fix PF/VF dependency issue sathyanarayanan.kuppuswamy 2019-08-02 0:05 ` [PATCH v5 1/7] PCI/ATS: Fix pci_prg_resp_pasid_required() dependency issues sathyanarayanan.kuppuswamy 2019-08-12 20:04 ` Bjorn Helgaas 2019-08-12 20:20 ` sathyanarayanan kuppuswamy 2019-08-13 3:51 ` Bjorn Helgaas 2019-08-16 18:06 ` Kuppuswamy Sathyanarayanan 2019-08-02 0:05 ` [PATCH v5 2/7] PCI/ATS: Initialize PRI in pci_ats_init() sathyanarayanan.kuppuswamy 2019-08-12 20:04 ` Bjorn Helgaas 2019-08-12 21:35 ` sathyanarayanan kuppuswamy 2019-08-13 4:10 ` Bjorn Helgaas 2019-08-15 4:46 ` Bjorn Helgaas 2019-08-15 17:30 ` Kuppuswamy Sathyanarayanan 2019-08-16 17:31 ` Bjorn Helgaas 2019-08-02 0:06 ` [PATCH v5 3/7] PCI/ATS: Initialize PASID " sathyanarayanan.kuppuswamy 2019-08-12 20:04 ` Bjorn Helgaas 2019-08-15 4:48 ` Bjorn Helgaas 2019-08-15 4:56 ` Bjorn Helgaas 2019-08-15 17:31 ` Kuppuswamy Sathyanarayanan 2019-08-02 0:06 ` [PATCH v5 4/7] PCI/ATS: Add PRI support for PCIe VF devices sathyanarayanan.kuppuswamy 2019-08-12 20:04 ` Bjorn Helgaas 2019-08-12 21:40 ` sathyanarayanan kuppuswamy 2019-08-13 4:16 ` Bjorn Helgaas 2019-08-15 22:20 ` Bjorn Helgaas 2019-08-15 22:39 ` Kuppuswamy Sathyanarayanan 2019-08-19 14:15 ` Bjorn Helgaas 2019-08-19 22:53 ` Kuppuswamy Sathyanarayanan 2019-08-19 23:19 ` Bjorn Helgaas 2019-08-28 18:21 ` Kuppuswamy Sathyanarayanan 2019-08-28 18:57 ` Bjorn Helgaas 2019-08-02 0:06 ` [PATCH v5 5/7] PCI/ATS: Add PASID " sathyanarayanan.kuppuswamy 2019-08-12 20:05 ` Bjorn Helgaas 2019-08-13 22:19 ` Kuppuswamy Sathyanarayanan [this message] 2019-08-15 5:04 ` Bjorn Helgaas 2019-08-16 1:21 ` Kuppuswamy Sathyanarayanan 2019-08-02 0:06 ` [PATCH v5 6/7] PCI/ATS: Disable PF/VF ATS service independently sathyanarayanan.kuppuswamy 2019-08-02 0:06 ` [PATCH v5 7/7] PCI: Skip Enhanced Allocation (EA) initialization for VF device sathyanarayanan.kuppuswamy
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20190813221958.GA139211@skuppusw-desk.amr.corp.intel.com \ --to=sathyanarayanan.kuppuswamy@linux.intel.com \ --cc=ashok.raj@intel.com \ --cc=helgaas@kernel.org \ --cc=keith.busch@intel.com \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-pci@vger.kernel.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
Linux-PCI Archive on lore.kernel.org Archives are clonable: git clone --mirror https://lore.kernel.org/linux-pci/0 linux-pci/git/0.git # If you have public-inbox 1.1+ installed, you may # initialize and index your mirror using the following commands: public-inbox-init -V2 linux-pci linux-pci/ https://lore.kernel.org/linux-pci \ linux-pci@vger.kernel.org public-inbox-index linux-pci Example config snippet for mirrors Newsgroup available over NNTP: nntp://nntp.lore.kernel.org/org.kernel.vger.linux-pci AGPL code for this site: git clone https://public-inbox.org/public-inbox.git