From: Vidya Sagar <vidyas@nvidia.com>
To: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
<robh+dt@kernel.org>, <thierry.reding@gmail.com>,
<jonathanh@nvidia.com>, <andrew.murray@arm.com>
Cc: <kishon@ti.com>, <gustavo.pimentel@synopsys.com>,
<digetx@gmail.com>, <mperttunen@nvidia.com>,
<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>, <kthota@nvidia.com>,
<mmaddireddy@nvidia.com>, <vidyas@nvidia.com>,
<sagar.tv@gmail.com>
Subject: [PATCH V4 1/6] dt-bindings: PCI: tegra: Add sideband pins configuration entries
Date: Thu, 5 Sep 2019 16:15:48 +0530 [thread overview]
Message-ID: <20190905104553.2884-2-vidyas@nvidia.com> (raw)
In-Reply-To: <20190905104553.2884-1-vidyas@nvidia.com>
Add optional bindings "pinctrl-names" and "pinctrl-0" to describe pin
configuration information of a particular PCIe controller.
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Thierry Reding <treding@nvidia.com>
---
V4:
* None
V3:
* None
V2:
* None
.../devicetree/bindings/pci/nvidia,tegra194-pcie.txt | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
index 674e5adb2895..0ac1b867ac24 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra194-pcie.txt
@@ -83,6 +83,11 @@ Required properties:
- vddio-pex-ctl-supply: Regulator supply for PCIe side band signals
Optional properties:
+- pinctrl-names: A list of pinctrl state names.
+ It is mandatory for C5 controller and optional for other controllers.
+ - "default": Configures PCIe I/O for proper operation.
+- pinctrl-0: phandle for the 'default' state of pin configuration.
+ It is mandatory for C5 controller and optional for other controllers.
- supports-clkreq: Refer to Documentation/devicetree/bindings/pci/pci.txt
- nvidia,update-fc-fixup: This is a boolean property and needs to be present to
improve performance when a platform is designed in such a way that it
@@ -120,6 +125,9 @@ Tegra194:
num-lanes = <8>;
linux,pci-domain = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
+
clocks = <&bpmp TEGRA194_CLK_PEX0_CORE_0>;
clock-names = "core";
--
2.17.1
next prev parent reply other threads:[~2019-09-05 10:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-05 10:45 [PATCH V4 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 in p2972-0000 platform Vidya Sagar
2019-09-05 10:45 ` Vidya Sagar [this message]
2019-09-05 10:45 ` [PATCH V4 2/6] dt-bindings: PCI: tegra: Add PCIe slot supplies regulator entries Vidya Sagar
2019-09-05 10:45 ` [PATCH V4 3/6] PCI: tegra: Add support to configure sideband pins Vidya Sagar
2019-09-05 10:45 ` [PATCH V4 4/6] PCI: tegra: Add support to enable slot regulators Vidya Sagar
2019-09-05 10:45 ` [PATCH V4 5/6] arm64: tegra: Add configuration for PCIe C5 sideband signals Vidya Sagar
2019-09-05 10:45 ` [PATCH V4 6/6] arm64: tegra: Add PCIe slot supply information in p2972-0000 platform Vidya Sagar
2019-09-05 11:20 ` [PATCH V4 0/6] PCI: tegra: Enable PCIe C5 controller of Tegra194 " Lorenzo Pieralisi
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190905104553.2884-2-vidyas@nvidia.com \
--to=vidyas@nvidia.com \
--cc=andrew.murray@arm.com \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=digetx@gmail.com \
--cc=gustavo.pimentel@synopsys.com \
--cc=jonathanh@nvidia.com \
--cc=kishon@ti.com \
--cc=kthota@nvidia.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=lorenzo.pieralisi@arm.com \
--cc=mmaddireddy@nvidia.com \
--cc=mperttunen@nvidia.com \
--cc=robh+dt@kernel.org \
--cc=sagar.tv@gmail.com \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).