From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: Remi Pommarel <repk@triplefau.lt>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Ellie Reeves <ellierevves@gmail.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3] PCI: aardvark: Fix PCI_EXP_RTCTL register configuration
Date: Wed, 25 Sep 2019 14:08:04 +0200 [thread overview]
Message-ID: <20190925140804.75ccf336@windsurf> (raw)
In-Reply-To: <20190614101059.1664-1-repk@triplefau.lt>
On Fri, 14 Jun 2019 12:10:59 +0200
Remi Pommarel <repk@triplefau.lt> wrote:
> PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it
> should not modify other interrupts' mask. The ISR mask polarity was also
> inverted, when PCI_EXP_RTCTL_PMEIE is set PCIE_MSG_PM_PME_MASK mask bit
> should actually be cleared.
>
> Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space")
> Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Sorry for the long delay, but:
Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
I did verify that indeed the polarity of the PME interrupt bit is
different between the standard PCI_EXP_RTCTL register and the
Aardvark-specific ISR0 mask register. And obviously, we shouldn't
clobber other bits of the ISR0 mask register when changing the PME
interrupt enable/disable state.
I did a quick test with a E1000E NIC and it worked fine.
Thanks!
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
next prev parent reply other threads:[~2019-09-25 12:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-14 10:10 [PATCH v3] PCI: aardvark: Fix PCI_EXP_RTCTL register configuration Remi Pommarel
2019-06-17 12:43 ` Lorenzo Pieralisi
2019-06-27 14:22 ` Lorenzo Pieralisi
2019-08-06 16:28 ` Lorenzo Pieralisi
2019-09-25 12:08 ` Thomas Petazzoni [this message]
2019-10-15 10:00 ` Lorenzo Pieralisi
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