From: Lukas Wunner <lukas@wunner.de>
To: Alex Deucher <alexdeucher@gmail.com>
Cc: Dave Airlie <airlied@gmail.com>,
Lucas Stach <l.stach@pengutronix.de>,
Ben Skeggs <skeggsb@gmail.com>,
Karol Herbst <karolherbst@gmail.com>,
"Alex G." <mr.nuke.me@gmail.com>,
Bjorn Helgaas <helgaas@kernel.org>,
Alexandru Gagniuc <alex_gagniuc@dellteam.com>,
Keith Busch <keith.busch@intel.com>, Jens Axboe <axboe@fb.com>,
Christoph Hellwig <hch@lst.de>, Sagi Grimberg <sagi@grimberg.me>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Jan Vesely <jano.vesely@gmail.com>,
Alex Williamson <alex.williamson@redhat.com>,
Austin Bolen <austin_bolen@dell.com>,
Shyam Iyer <Shyam_Iyer@dell.com>, Sinan Kaya <okaya@kernel.org>,
Linux PCI <linux-pci@vger.kernel.org>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: Issues with "PCI/LINK: Report degraded links via link bandwidth notification"
Date: Tue, 4 Feb 2020 05:38:25 +0100 [thread overview]
Message-ID: <20200204043825.thpbqpz3ao7zqvlh@wunner.de> (raw)
In-Reply-To: <CADnq5_PRQJmG_NYHmqWhv2R1utaNf0LcTVgFA7LMeYr75fy55w@mail.gmail.com>
On Mon, Feb 03, 2020 at 04:16:36PM -0500, Alex Deucher wrote:
> AMD has had a micro-controller on the GPU handling pcie link speeds
> and widths dynamically (in addition to GPU clocks and voltages) for
> about 12 years or so at this point to save power when the GPU is idle
> and improve performance when it's required. The micro-controller
> changes the link parameters dynamically based on load independent of
> the driver. The driver can tweak the heuristics, or even disable the
> dynamic changes, but by default it's enabled when the driver loads.
> The ucode for this micro-controller is loaded by the driver so you'll
> see fixed clocks and widths prior to the driver loading. We'd need
> some sort of opt out I suppose for periods when the driver has enabled
> dynamic pcie power management in the micro-controller.
Note that there are *two* bits in the Link Status Register:
* Link Autonomous Bandwidth Status
"This bit is Set by hardware to indicate that hardware has
autonomously changed Link speed or width, without the Port
transitioning through DL_Down status, for reasons other than to
attempt to correct unreliable Link operation. This bit must be set if
the Physical Layer reports a speed or width change was initiated by
the Downstream component that was indicated as an autonomous change."
* Link Bandwidth Management Status
"This bit is Set by hardware to indicate that either of the
following has occurred without the Port transitioning through
DL_Down status. [...] Hardware has changed Link speed or width to
attempt to correct unreliable Link operation, either through an
LTSSM timeout or a higher level process."
See PCIe Base Spec 4.0 sec 7.8.8, 7.8.7, 4.2.6.3.3.1.
The two bits generate *separate* interrupts. We only enable the
interrupt for the latter.
If AMD GPUs generate a Link Bandwidth Management Interrupt upon
autonomously changing bandwidth for power management reasons
(instead of to correct unreliability issues), that would be a
spec violation.
So the question is, do your GPUs violate the spec in this regard?
Thanks,
Lukas
next prev parent reply other threads:[~2020-02-04 4:38 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-15 22:10 Issues with "PCI/LINK: Report degraded links via link bandwidth notification" Bjorn Helgaas
2020-01-16 2:44 ` Alex G
2020-01-18 0:18 ` Bjorn Helgaas
2020-01-20 2:33 ` Bjorn Helgaas
2020-01-20 15:56 ` Alex Williamson
2020-01-20 16:01 ` Alex G.
2020-01-21 11:10 ` Lucas Stach
2020-01-21 14:55 ` Alex G.
2020-02-03 1:56 ` Dave Airlie
2020-02-03 2:04 ` Dave Airlie
2020-02-03 2:07 ` Ben Skeggs
2020-02-03 21:16 ` Alex Deucher
2020-02-04 4:38 ` Lukas Wunner [this message]
2020-02-04 14:47 ` Alex Deucher
2020-01-30 16:26 ` Christoph Hellwig
2020-02-22 16:58 ` Bjorn Helgaas
2021-01-28 23:39 ` Bjorn Helgaas
2021-01-28 23:51 ` Sinan Kaya
2021-01-29 0:07 ` Alex G.
2021-01-29 21:56 ` Bjorn Helgaas
2021-02-02 19:50 ` Alex G.
2021-02-02 20:16 ` Bjorn Helgaas
2021-02-02 20:25 ` Alex G.
2021-01-29 1:30 ` Alex Deucher
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