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From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	iommu@lists.linux-foundation.org, will@kernel.org,
	bhelgaas@google.com
Cc: joro@8bytes.org, robin.murphy@arm.com,
	jonathan.cameron@huawei.com, zhangfei.gao@linaro.org
Subject: [PATCH 3/4] iommu/arm-smmu-v3: Batch context descriptor invalidation
Date: Thu, 13 Feb 2020 11:14:34 +0100	[thread overview]
Message-ID: <20200213101435.229932-4-jean-philippe@linaro.org> (raw)
In-Reply-To: <20200213101435.229932-1-jean-philippe@linaro.org>

Rather than publishing one command at a time when invalidating a context
descriptor, batch the commands for all SIDs in the domain.

Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
 drivers/iommu/arm-smmu-v3.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 6b76df37025e..11123fbf22a5 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1487,8 +1487,10 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
 			     int ssid, bool leaf)
 {
 	size_t i;
+	int cmdn = 0;
 	unsigned long flags;
 	struct arm_smmu_master *master;
+	u64 cmds[CMDQ_BATCH_ENTRIES * CMDQ_ENT_DWORDS];
 	struct arm_smmu_device *smmu = smmu_domain->smmu;
 	struct arm_smmu_cmdq_ent cmd = {
 		.opcode	= CMDQ_OP_CFGI_CD,
@@ -1501,13 +1503,19 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
 	spin_lock_irqsave(&smmu_domain->devices_lock, flags);
 	list_for_each_entry(master, &smmu_domain->devices, domain_head) {
 		for (i = 0; i < master->num_sids; i++) {
+			if (cmdn == CMDQ_BATCH_ENTRIES) {
+				arm_smmu_cmdq_issue_cmdlist(smmu, cmds, cmdn, false);
+				cmdn = 0;
+			}
+
 			cmd.cfgi.sid = master->sids[i];
-			arm_smmu_cmdq_issue_cmd(smmu, &cmd);
+			arm_smmu_cmdq_build_cmd(&cmds[cmdn * CMDQ_ENT_DWORDS], &cmd);
+			cmdn++;
 		}
 	}
 	spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
 
-	arm_smmu_cmdq_issue_sync(smmu);
+	arm_smmu_cmdq_issue_cmdlist(smmu, cmds, cmdn, true);
 }
 
 static int arm_smmu_alloc_cd_leaf_table(struct arm_smmu_device *smmu,
-- 
2.25.0


  parent reply	other threads:[~2020-02-13 10:14 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-13 10:14 [PATCH 0/4] iommu: Finish off PASID support for Arm SMMUv3 Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 1/4] PCI/ATS: Export symbols of PASID functions Jean-Philippe Brucker
2020-02-13 10:14 ` [PATCH 2/4] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker
2020-02-13 10:14 ` Jean-Philippe Brucker [this message]
2020-02-13 10:14 ` [PATCH 4/4] iommu/arm-smmu-v3: Write level-1 descriptors atomically Jean-Philippe Brucker

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