Linux-PCI Archive on lore.kernel.org
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From: Sasha Levin <sashal@kernel.org>
To: linux-kernel@vger.kernel.org, stable@vger.kernel.org
Cc: Marcel Ziswiler <marcel@ziswiler.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <andrew.murray@arm.com>,
	Thierry Reding <treding@nvidia.com>,
	Sasha Levin <sashal@kernel.org>,
	linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org
Subject: [PATCH AUTOSEL 5.4 054/459] PCI: tegra: Fix afi_pex2_ctrl reg offset for Tegra30
Date: Fri, 14 Feb 2020 10:55:04 -0500
Message-ID: <20200214160149.11681-54-sashal@kernel.org> (raw)
In-Reply-To: <20200214160149.11681-1-sashal@kernel.org>

From: Marcel Ziswiler <marcel@ziswiler.com>

[ Upstream commit 21a92676e1fe292acb077b13106b08c22ed36b14 ]

Fix AFI_PEX2_CTRL reg offset for Tegra30 by moving it from the Tegra20
SoC struct where it erroneously got added. This fixes the AFI_PEX2_CTRL
reg offset being uninitialised subsequently failing to bring up the
third PCIe port.

Fixes: adb2653b3d2e ("PCI: tegra: Add AFI_PEX2_CTRL reg offset as part of SoC struct")
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
---
 drivers/pci/controller/pci-tegra.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 090b632965e21..ac93f5a0398e4 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -2499,7 +2499,6 @@ static const struct tegra_pcie_soc tegra20_pcie = {
 	.num_ports = 2,
 	.ports = tegra20_pcie_ports,
 	.msi_base_shift = 0,
-	.afi_pex2_ctrl = 0x128,
 	.pads_pll_ctl = PADS_PLL_CTL_TEGRA20,
 	.tx_ref_sel = PADS_PLL_CTL_TXCLKREF_DIV10,
 	.pads_refclk_cfg0 = 0xfa5cfa5c,
@@ -2528,6 +2527,7 @@ static const struct tegra_pcie_soc tegra30_pcie = {
 	.num_ports = 3,
 	.ports = tegra30_pcie_ports,
 	.msi_base_shift = 8,
+	.afi_pex2_ctrl = 0x128,
 	.pads_pll_ctl = PADS_PLL_CTL_TEGRA30,
 	.tx_ref_sel = PADS_PLL_CTL_TXCLKREF_BUF_EN,
 	.pads_refclk_cfg0 = 0xfa5cfa5c,
-- 
2.20.1


  parent reply index

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20200214160149.11681-1-sashal@kernel.org>
2020-02-14 15:54 ` [PATCH AUTOSEL 5.4 022/459] PCI: Fix pci_add_dma_alias() bitmask size Sasha Levin
2020-02-14 15:55 ` [PATCH AUTOSEL 5.4 051/459] PCI/switchtec: Fix vep_vector_number ioread width Sasha Levin
2020-02-14 15:55 ` Sasha Levin [this message]
2020-02-14 15:56 ` [PATCH AUTOSEL 5.4 155/459] PCI/IOV: Fix memory leak in pci_iov_add_virtfn() Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 177/459] PCI: iproc: Apply quirk_paxc_bridge() for module as well as built-in Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 179/459] PCI: Add generic quirk for increasing D3hot delay Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 180/459] PCI: Increase D3 delay for AMD Ryzen5/7 XHCI controllers Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 196/459] PCI: Add nr_devfns parameter to pci_add_dma_alias() Sasha Levin
2020-02-14 15:57 ` [PATCH AUTOSEL 5.4 197/459] PCI: Add DMA alias quirk for PLX PEX NTB Sasha Levin
2020-02-14 15:59 ` [PATCH AUTOSEL 5.4 293/459] PCI: Don't disable bridge BARs when assigning bus resources Sasha Levin
2020-02-14 16:00 ` [PATCH AUTOSEL 5.4 394/459] PCI/AER: Initialize aer_fifo Sasha Levin

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