From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Marc Gonzalez <marc.w.gonzalez@free.fr>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>,
Stanimir Varbanov <svarbanov@mm-sol.com>,
Andrew Murray <andrew.murray@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, stable@vger.kernel.org
Subject: Re: [PATCH v2] PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM
Date: Fri, 21 Feb 2020 14:35:25 +0000 [thread overview]
Message-ID: <20200221143525.GC15440@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <9c7d69cc-29e7-07c5-1e93-e9fdadf370a6@free.fr>
On Mon, Dec 30, 2019 at 09:25:28PM +0100, Marc Gonzalez wrote:
> On 29/12/2019 03:45, Bjorn Andersson wrote:
>
> > On Sat 28 Dec 07:41 PST 2019, Marc Gonzalez wrote:
> >
> >> On 27/12/2019 09:51, Stanimir Varbanov wrote:
> >>
> >>> On 12/27/19 3:27 AM, Bjorn Andersson wrote:
> >>>
> >>>> There exists non-bridge PCIe devices with PCI_VENDOR_ID_QCOM, so limit
> >>>> the fixup to only affect the relevant PCIe bridges.
> >>>>
> >>>> Cc: stable@vger.kernel.org
> >>>> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> >>>> ---
> >>>>
> >>>> Stan, I picked up all the suggested device id's from the previous thread and
> >>>> added 0x1000 for QCS404. I looked at creating platform specific defines in
> >>>> pci_ids.h, but SDM845 has both 106 and 107... Please let me know if you would
> >>>> prefer that I do this anyway.
> >>>
> >>> Looks good,
> >>>
> >>> Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
> >>>
> >>>> drivers/pci/controller/dwc/pcie-qcom.c | 8 +++++++-
> >>>> 1 file changed, 7 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
> >>>> index 5ea527a6bd9f..138e1a2d21cc 100644
> >>>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
> >>>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> >>>> @@ -1439,7 +1439,13 @@ static void qcom_fixup_class(struct pci_dev *dev)
> >>>> {
> >>>> dev->class = PCI_CLASS_BRIDGE_PCI << 8;
> >>>> }
> >>>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, PCI_ANY_ID, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0101, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0104, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0106, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0107, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x0302, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1000, qcom_fixup_class);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_QCOM, 0x1001, qcom_fixup_class);
> >>
> >> Hrmmm... still not CCed on the patch,
> >
> > You are Cc'ed on the patch, but as usual your mail server responds "451
> > too many errors from your ip" and throw my emails away.
> >
> >> and still don't think the fixup is required(?) for 0x106 and 0x107.
> >>
> >
> > I re-read your reply in my v1 thread. So we know that 0x104 doesn't need
> > the fixup, so presumably only 0x101 needs the fixup?
>
> I apologize for the tone of my reply. I did not mean to sound
> so snarky.
>
> All I can say is that, if I remember correctly, the fixup was
> not necessary on apq8098 (0x0105) and it was probably not
> required on msm8996 and sdm845. For older platforms, all bets
> are off.
How are we proceeding with this patch then ?
Thanks,
Lorenzo
next prev parent reply other threads:[~2020-02-21 14:35 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-27 1:27 [PATCH v2] PCI: qcom: Fix the fixup of PCI_VENDOR_ID_QCOM Bjorn Andersson
2019-12-27 8:51 ` Stanimir Varbanov
2019-12-28 15:41 ` Marc Gonzalez
2019-12-29 2:45 ` Bjorn Andersson
2019-12-30 20:25 ` Marc Gonzalez
2020-02-21 14:35 ` Lorenzo Pieralisi [this message]
2020-02-26 9:27 ` Stanimir Varbanov
2020-02-26 10:22 ` Lorenzo Pieralisi
2020-02-26 10:56 ` Stanimir Varbanov
2020-02-26 11:05 ` Lorenzo Pieralisi
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