From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org, will@kernel.org,
bhelgaas@google.com
Cc: joro@8bytes.org, robin.murphy@arm.com,
jonathan.cameron@huawei.com, zhangfei.gao@linaro.org,
robh@kernel.org
Subject: [PATCH v2 5/6] iommu/arm-smmu-v3: Batch context descriptor invalidation
Date: Mon, 24 Feb 2020 17:58:45 +0100 [thread overview]
Message-ID: <20200224165846.345993-6-jean-philippe@linaro.org> (raw)
In-Reply-To: <20200224165846.345993-1-jean-philippe@linaro.org>
Rather than publishing one command at a time when invalidating a context
descriptor, batch the commands for all SIDs in the domain.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
---
drivers/iommu/arm-smmu-v3.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index beeec366bc41..12b2a0fa747e 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -1512,6 +1512,7 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
size_t i;
unsigned long flags;
struct arm_smmu_master *master;
+ struct arm_smmu_cmdq_batch cmds = {};
struct arm_smmu_device *smmu = smmu_domain->smmu;
struct arm_smmu_cmdq_ent cmd = {
.opcode = CMDQ_OP_CFGI_CD,
@@ -1525,12 +1526,12 @@ static void arm_smmu_sync_cd(struct arm_smmu_domain *smmu_domain,
list_for_each_entry(master, &smmu_domain->devices, domain_head) {
for (i = 0; i < master->num_sids; i++) {
cmd.cfgi.sid = master->sids[i];
- arm_smmu_cmdq_issue_cmd(smmu, &cmd);
+ arm_smmu_cmdq_batch_add(smmu, &cmds, &cmd);
}
}
spin_unlock_irqrestore(&smmu_domain->devices_lock, flags);
- arm_smmu_cmdq_issue_sync(smmu);
+ arm_smmu_cmdq_batch_submit(smmu, &cmds);
}
static int arm_smmu_alloc_cd_leaf_table(struct arm_smmu_device *smmu,
--
2.25.0
next prev parent reply other threads:[~2020-02-24 16:59 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-24 16:58 [PATCH v2 0/6] iommu/arm-smmu-v3: Finish PASID support and command queue batching Jean-Philippe Brucker
2020-02-24 16:58 ` [PATCH v2 1/6] PCI/ATS: Export symbols of PASID functions Jean-Philippe Brucker
2020-03-18 18:36 ` Bjorn Helgaas
2020-03-18 21:12 ` Will Deacon
2020-02-24 16:58 ` [PATCH v2 2/6] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker
2020-02-24 16:58 ` [PATCH v2 3/6] iommu/arm-smmu-v3: Write level-1 descriptors atomically Jean-Philippe Brucker
2020-02-24 16:58 ` [PATCH v2 4/6] iommu/arm-smmu-v3: Add command queue batching helpers Jean-Philippe Brucker
2020-02-24 16:58 ` Jean-Philippe Brucker [this message]
2020-02-24 16:58 ` [PATCH v2 6/6] iommu/arm-smmu-v3: Batch ATC invalidation commands Jean-Philippe Brucker
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