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From: Bjorn Helgaas <helgaas@kernel.org>
To: Sean V Kelley <sean.v.kelley@linux.intel.com>
Cc: tglx@linutronix.de, corbet@lwn.net, mingo@redhat.com,
	bp@alien8.de, x86@kernel.org, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org,
	kar.hin.ong@ni.com, sassmann@kpanic.de
Subject: Re: [PATCH v2 0/2] pci: Add boot interrupt quirk mechanism for Xeon chipsets
Date: Thu, 27 Feb 2020 16:49:30 -0600	[thread overview]
Message-ID: <20200227224930.GA158759@google.com> (raw)
In-Reply-To: <20200220192930.64820-1-sean.v.kelley@linux.intel.com>

On Thu, Feb 20, 2020 at 11:29:28AM -0800, Sean V Kelley wrote:
> Changes since v1 [1]:
> 
> - Correct Documentation section title for 6300ESB chipset.
> (Jonathan Derrick)
> 
> - Use consistent abbreviations in comments for IO-APIC and Core IO.
> (Andy Shevchenko)
> 
> - Retained Reviewed-by tag due to no technical changes.
> 
> [1]: https://lore.kernel.org/lkml/20200214213313.66622-1-sean.v.kelley@linux.intel.com/
> 
> Bjorn, I'm open for it to go to stable as well.
> 
> --
> 
> When IRQ lines on secondary or higher IO-APICs are masked (e.g.,
> Real-Time threaded interrupts), many chipsets redirect IRQs on
> this line to the legacy PCH and in turn the base IO-APIC in the
> system. The unhandled interrupts on the base IO-APIC will be
> identified by the Linux kernel as Spurious Interrupts and can
> lead to disabled IRQ lines.
> 
> Disabling this legacy PCI interrupt routing is chipset-specific and
> varies in mechanism between chipset vendors and across generations.
> In some cases the mechanism is exposed to BIOS but not all BIOS
> vendors chose to pick it up. With the increasing usage of RT as it
> marches towards mainline, additional issues have been raised with
> more recent Xeon chipsets.
> 
> This patchset disables the boot interrupt on these Xeon chipsets where
> this is possible with an additional mechanism. In addition, this
> patchset includes documentation covering the background of this quirk.
> 
> 
> Sean V Kelley (2):
>   pci: Add boot interrupt quirk mechanism for Xeon chipsets
>   Documentation:PCI: Add background on Boot Interrupts
> 
>  Documentation/PCI/boot-interrupts.rst | 153 ++++++++++++++++++++++++++
>  Documentation/PCI/index.rst           |   1 +
>  drivers/pci/quirks.c                  |  80 ++++++++++++--
>  3 files changed, 227 insertions(+), 7 deletions(-)
>  create mode 100644 Documentation/PCI/boot-interrupts.rst

Applied to pci/interrupts for v5.7.  I added a stable tag.

Thanks a lot; this is really a nice piece of work!

  parent reply	other threads:[~2020-02-27 22:49 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-20 19:29 Sean V Kelley
2020-02-20 19:29 ` [PATCH v2 1/2] " Sean V Kelley
2020-02-20 19:29 ` [PATCH v2 2/2] Documentation:PCI: Add background on Boot Interrupts Sean V Kelley
2020-02-27 22:49 ` Bjorn Helgaas [this message]
     [not found] ` <b2da25c8-121a-b241-c028-68e49bab0081@tik.uni-stuttgart.de>
2020-11-25 11:54   ` boot interrupt quirk (also in 4.19.y) breaks serial ports (was: [PATCH v2 0/2] pci: Add boot interrupt quirk mechanism for Xeon chipsets) Thomas Gleixner
2020-11-25 13:41     ` Stefan Bühler
2020-11-26 23:45       ` Thomas Gleixner
2020-11-27  9:17         ` Stefan Bühler
2020-11-30 10:48           ` Thomas Gleixner
2022-09-23 19:20   ` Grzegorz Halat
2022-09-26 21:17     ` Bjorn Helgaas
2022-09-28  8:34     ` boot interrupt quirk (also in 4.19.y) breaks serial ports (was: [PATCH v2 0/2] pci: Add boot interrupt quirk mechanism for Xeon chipsets) #forregzbot Thorsten Leemhuis

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