From: kbuild test robot <lkp@intel.com>
To: Stanislav Spassov <stanspas@amazon.com>
Cc: kbuild-all@lists.01.org, linux-pci@vger.kernel.org,
Linux Memory Management List <linux-mm@kvack.org>
Subject: Re: [PATCH v2 06/17] PCI: Fix us->ms conversion in pci_acpi_optimize_delay
Date: Tue, 3 Mar 2020 13:54:25 +0800 [thread overview]
Message-ID: <202003031355.Zj8r3iAj%lkp@intel.com> (raw)
In-Reply-To: <20200302184429.12880-7-stanspas@amazon.com>
[-- Attachment #1: Type: text/plain, Size: 5067 bytes --]
Hi Stanislav,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9]
url: https://github.com/0day-ci/linux/commits/Stanislav-Spassov/Improve-PCI-device-post-reset-readiness-polling/20200303-043307
base: bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9
config: i386-randconfig-d001-20200302 (attached as .config)
compiler: gcc-7 (Debian 7.5.0-5) 7.5.0
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
ld: drivers/pci/pci-acpi.o: in function `pci_acpi_optimize_delay':
>> drivers/pci/pci-acpi.c:1242: undefined reference to `__udivdi3'
>> ld: drivers/pci/pci-acpi.c:1243: undefined reference to `__umoddi3'
ld: drivers/pci/pci-acpi.c:1250: undefined reference to `__udivdi3'
ld: drivers/pci/pci-acpi.c:1251: undefined reference to `__umoddi3'
vim +1242 drivers/pci/pci-acpi.c
1178
1179 /**
1180 * pci_acpi_optimize_delay - optimize PCI D3 and D3cold delay from ACPI
1181 * @pdev: the PCI device whose delay is to be updated
1182 * @handle: ACPI handle of this device
1183 *
1184 * Update the d3_delay and d3cold_delay of a PCI device from the ACPI _DSM
1185 * Function 9 of the device, and cache the parent host bridge's flag for
1186 * ignoring reset delay upon Sx Resume (the flag is originally set in
1187 * acpi_pci_add_bus through _DSM Function 8).
1188 *
1189 * Function 9, "Device Readiness Durations," applies only to the object
1190 * where it is located. It returns delay durations required after various
1191 * events if the device requires less time than the spec requires.
1192 * Values provided by this function can only be used to lower (reduce) the
1193 * latency required by specification or values discovered from device.
1194 *
1195 * This _DSM function is defined by the PCI Firmware Specification Rev 3.2
1196 * (January 26, 2015), after originally introduced by a draft ECN of
1197 * January 28, 2014, titled "ACPI additions for FW latency optimizations."
1198 *
1199 * XXX The PCI Firmware Specification contradicts itself by stating, in addition
1200 * to the above "can only be used to lower (reduce)", that also:
1201 * Values must be interpreted as overriding any Configuration Ready indicator
1202 * from hardware, whether increasing or decreasing required delays. This
1203 * includes ignoring FRS and DRS notifications where overridden by this
1204 * _DSM function, as well as ignoring values specified in the Readiness Time
1205 * Reporting Extended Capability, if present.
1206 * Meanwhile, the PCI Express Base Specification Revision 5.0 Version 1.0
1207 * (22 May 2019) states in section 7.9.17 Readiness Time Reporting Extended
1208 * Capability:
1209 * Software is permitted to issue requests upon the earliest of:
1210 * - Receiving a Readiness Notification messages
1211 * - Waiting the appropriate time as per relevant specifications
1212 * - Waiting the time indicated in the associated field of this capability
1213 * - Waiting the time defined by system software or firmware
1214 * The kernel does not yet support Readiness Notifications, and does not yet
1215 * use a Readiness Time Reporting capability if present, so we do not need to
1216 * worry about the prioritization for now.
1217 */
1218 static void pci_acpi_optimize_delay(struct pci_dev *pdev,
1219 acpi_handle handle)
1220 {
1221 struct pci_host_bridge *bridge = pci_find_host_bridge(pdev->bus);
1222 /*
1223 * _DSM 9 provides values in microseconds, but the kernel uses msleep()
1224 * when waiting, so the code below rounds up when setting value in ms
1225 */
1226 u64 value_us;
1227 int value;
1228 union acpi_object *obj, *elements;
1229
1230 pdev->ignore_reset_delay_on_sx_resume =
1231 bridge->ignore_reset_delay_on_sx_resume;
1232
1233 obj = acpi_evaluate_dsm(handle, &pci_acpi_dsm_guid, 3,
1234 FUNCTION_DELAY_DSM, NULL);
1235 if (!obj)
1236 return;
1237
1238 if (obj->type == ACPI_TYPE_PACKAGE && obj->package.count == 5) {
1239 elements = obj->package.elements;
1240 if (elements[0].type == ACPI_TYPE_INTEGER) {
1241 value_us = elements[0].integer.value;
> 1242 value = (int)(value_us / 1000);
> 1243 if (value_us % 1000 > 0)
1244 value++;
1245 if (value < PCI_PM_D3COLD_WAIT)
1246 pdev->d3cold_delay = value;
1247 }
1248 if (elements[3].type == ACPI_TYPE_INTEGER) {
1249 value_us = elements[3].integer.value;
1250 value = (int)(value_us / 1000);
1251 if (value_us % 1000 > 0)
1252 value++;
1253 if (value < PCI_PM_D3_WAIT)
1254 pdev->d3_delay = value;
1255 }
1256 }
1257 ACPI_FREE(obj);
1258 }
1259
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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next prev parent reply other threads:[~2020-03-03 5:55 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-02 18:44 [PATCH v2 00/17] Improve PCI device post-reset readiness polling Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 01/17] PCI: Fall back to slot/bus reset if softer methods timeout Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 02/17] PCI: Remove unused PCI_PM_BUS_WAIT Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 03/17] PCI: Use pci_bridge_wait_for_secondary_bus after SBR Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 04/17] PCI: Do not override delay for D0->D3hot transition Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 05/17] PCI: Fix handling of _DSM 8 (avoiding reset delays) Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 06/17] PCI: Fix us->ms conversion in pci_acpi_optimize_delay Stanislav Spassov
2020-03-03 4:19 ` kbuild test robot
2020-03-03 5:54 ` kbuild test robot [this message]
2020-03-02 18:44 ` [PATCH v2 07/17] PCI: Clean up and document PM/reset delays Stanislav Spassov
2020-03-03 1:51 ` kbuild test robot
2020-03-03 2:54 ` kbuild test robot
2020-03-02 18:44 ` [PATCH v2 08/17] PCI: Add more delay overrides to struct pci_dev Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 09/17] PCI: Generalize pci_bus_max_d3cold_delay to pci_bus_max_delay Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 10/17] PCI: Use correct delay in pci_bridge_wait_for_secondary_bus Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 11/17] PCI: Refactor pci_dev_wait to remove timeout parameter Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 12/17] PCI: Refactor pci_dev_wait to take pci_init_event Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 13/17] PCI: Cache CRS Software Visibiliy in struct pci_dev Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 14/17] PCI: Introduce per-device reset_ready_poll override Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 15/17] PCI: Refactor polling loop out of pci_dev_wait Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 16/17] PCI: Add CRS handling to pci_dev_wait() Stanislav Spassov
2020-03-02 18:44 ` [PATCH v2 17/17] PCI: Lower PCIE_RESET_READY_POLL_MS from 1m to 1s Stanislav Spassov
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